Closed ASerbinski closed 6 years ago
Added a template. Stackable, with both surface mount and through hole options for the LS connector.
@ASerbinski Wow! Look at this PR, great stuff :-)
@mwelling will have to provide final review, but this looks amazing so far. Thanks for the contributions!
For the template it might be better to have one file for each of the LS and HS connector and give instructions how to change the footprint based on the stacking/SMT/THT configuration you wish to use. Otherwise the schematics are identical. The PCB portions of the template look okay. The template is fairly complete and should help someone get started relatively quickly using gEDA.
As for the contributed design it is not complete, just the start of a schematic. There is no PCB associated with it and the schematic would probably require a bit more work before even starting the PCB. I also noticed that the values of the passives are hidden making the design difficult to review at first glance. You have to click the part and view the properties just to see the value. I think that we would need to have someone agree to finishing this design before accepting it into the repository. I would prefer that the hierarchy is used associate the files as well.
We would also need someone to take a reviewer role for future gEDA designs.
Regarding the template, the reason for the duplication in the schematic portions is because there is a problem with switching the footprint within the schematic; when the board layout is updated with a different footprint, the new footprint has to be positioned within it manually. Or at least I'm not aware of any way to position it automatically.
As for the i2s board being incomplete, that is actually because you requested the incomplete schematic https://github.com/96boards/mezzanine-community/issues/64
I moved the template commit to a separate pull request. https://github.com/96boards/mezzanine-community/pull/70
I took the template but I am thinking that I might want to convert the i2s mezzanine to kicad so that it will have a maintainer. Unless you are willing to follow through and complete the design?
Let me know how you want to proceed.
Well, I would like to complete the design, but....
1) I'm not sure what kind of a schedule I can commit to, what would be expected if I were to commit to it? 2) I don't know exactly where to go with it from here. And by that, I mean in terms of what kind of connectors should be on it, headphone amplifier, whether or not to add a second pcm1865 and some digital mics to make a mic array as in https://github.com/96boards/mezzanine-community/issues/69
And of course, the more complex the project becomes, the more of a problem (1) becomes.
I'm actually leaning towards not adding the second pcm1865. It could be added easily as a separate board, and wouldn't even conflict when stacked as long as the i2c addresses are taken into consideration.
Commitment can be long term as long as there is commitment. I have plenty of other things I can work on.
Ok, then I can do this board.
But still need to finalize specifications.
The pcm1865 has 4 stereo inputs, one (stereo) is mic biased (in my schematics). There are two stereo line outputs from the pcm5142's.
Mic amp? Maybe a TPA6110A2? I just looked at this chip briefly, it has a shutdown pin, which I could pull high (off position) and connect up to the inner ring on a 4-conductor jack to pull low (on) when a 3 conductor headset is plugged into it.
Does anybody think that a second input pair should also be configured with microphone bias? That would support up to 4 analog (2 stereo) microphones this way, and still have 2 stereo line in.
This could all be set up with 7 stereo 3.5mm jacks out the back of the board. It will take up the entire board width, but they will all fit.
Would this suit everybody?
I'll try to do it within 2 layers, so it qualifies for seeed's $4.90/10 deal.
Lets talk about physical constraints;
I can't add all 7 connectors along the front connector area while simultaneously making the board high-speed stackable. There simply isn't enough space between the high speed port and the edge of the board. I would need ~20mm for that, and the platform only provides ~12.
Alternatives are; 1) I could move 3 of the connectors to the SIDES of the board. That would be 2 line in and 1 line out, leaving headset out, 1 line out, microphone in, and 1 line in on the back. 2) I could remove high speed stacking, allowing all connectors to run across the back. 3) -- probably least desirable -- I could extend the board by ~20mm (75x85) and put all the connectors out the back. I don't like this option, because it wouldn't line up with any boards, either regular or extended.
So obviously, I lied. Found some time today, did up the schematics the rest of the way, and banged out a board.
This is a 2-layer board.
This board is fully stackable. The HS connectors do not need to be installed. There are 7 audio connectors. Along the back: CONN401: Line Out 1 CONN501: Headphones Out (same channels as LO1) CONN403: Microphone In (Channel 1) CONN404: Line In (Channel 2)
On one side: CONN402: Line Out 2
On opposite side: CONN405: Line In (Channel 3) CONN406: Line In (Channel 4)
3.3v for the PCM5142's and PCM1865 are provided by L4931-3.3. Q101 is an FET for controlling the on/off state of the L4931-3.3. GPIO-K is the signal for Q101. If GPIO-K is needed, J101 can be moved from 1-2 to 2-3, this will place the L4931-3.3 in ON position and free GPIO-K for other uses.
If 4-channel output is not needed, the following components could be left out; U303, C318-C324, C409,C410, R403,R404, CONN402.
If operation of PCM1865 as clock master is not needed, the following components can be left out; U304, C332, C333.
I have not forgotten about the request to use the hierarchy in gEDA. I just haven't yet figured out how.
Nice! I will take a look. If hierarchy is difficult in gEDA this may be sufficient.
What I understand about the hierarchy is that you create a symbol wrapper for a schematic file, then add it like any normal symbol. The trouble I'm having is that there just doesn't seem to be any documentation on how to write that wrapper file to properly include the schematic.
This trace at the bottom of the U302 silkscreen is a bit too close to the edge for comfort. Not leaving enough room for scoring tolerance.
Looks like the wire overshot the resistor connection on R403 on the schematic.
The highlighted via is superfluous.
Otherwise looks okay for first a prototype assembly.
If you post the few fixes above I will merge and we can gear up for a first proto.
Please provide schematic PDF, BOM, and Gerbers for non-gEDA users if possible.
Ok. I'll make those changes in the morning.
Also provide a license file for your design. You can use a copyleft or permissive license as long as it is open hardware.
I think that's everything. I changed out the through hole LS connector for surface mount, since I couldn't find a supplier for it with 8mm tail. Now everything can be obtained from Mouser or similar.
These schematics are a subset of a much more complex project I have been working on, and are probably a good head start on an i2s mezzanine.
The PCM DI and DO of the 96boards LS port are connected to GPIO0 and GPIO1 of the pcm1865 respectively. GPIO0 is to be configured as DOUT2, GPIO1 is to be configured as DIN. This is done by setting register PCM186X_GPIO1_0_CTRL=0x65.
pcm1865 DOUT(1) is routed to the PCM5142 DIN's.
There is an optional 12.288 MHz crystal that can be populated at U304, along with C332 and C333 if it is desired for the PCM1865 to be able to operate in MASTER mode. When the PCM1865 is operating in MASTER mode, it is able to supply SCK to the PCM5142s via GPIO2.
3v3 is supplied by L4931-3.3, which can be switched on and off via GPIO-K. If being switchable is not desired, do not populate R110, R111, or Q101, do populate R112 with 0 ohm resistor.