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changed fifo to 2 in /etc/modprobe.d/smi_stream_mod_cariboulite.conf and ran `modprobe smi_stream_dev`
```
[2122501.219834] smi_stream_dev: loading out-of-tree module taints kernel.
[2122501.228047…
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Hi there,
I am looking to implement a simple (initially) IMU-less SteamVR tracker, and this project looks like a good starting point. It is my first use of programming an FPGA, but I would like to …
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https://github.com/chongxi/spiketag/commit/7ddcc9a3cf01c15c126736edd131c24db3180932
To simply high-level programming. I decided to build this class in a way it can be used in any stage of the proce…
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I've tried to upgrade from 2.3 to the latest version (currently 3.0d) and was having issues with programming it with the USB adapter provided on KNJN. I've read about using a JTAG to programming the S…
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Board resets when programming all 17 FPGAs for max current draw. (see anurag's test suite for more details)
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First of all, the following decision has to be made:
1. Shall the X flag act as Bernd described it here: https://github.com/sy2002/QNICE-FPGA/issues/160#issuecomment-707624518
2. Or shall the X-…
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Hi,
I've started programming a TinyFPGA BX board using Icestudio and it's been a breeze so far. Thanks for the excellent work on this project!
As my projects grew in complexity, I realized FPGA …
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- [x] SPI programming
- [x] DC-coupled busy lines (BOM issue only, just use 0 ohm 0402s)
- [x] Pulls on power controls
- [x] 3.3V on GPIO connector
- [x] Replace PCIe clock fanout and FPGA SYSCLK …
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## Programming model in Insider
The input data is written to a virtual file descriptor. The users only need to create a `vread()` statement in the host program to read output result (processed and r…
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I'm trying to sketch out the work here before I go on leave. I think most of the work here will be plumbing into blocks we've already written, but there will be other little things that will need to b…