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Hello,
Taking a look in ezsdk code I see it use SG dma method.
Does it mean that it does not support dma_alloc_coherent (contiguous) memory allocation ?
Thank you,
Ran
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Hi,
I followed the last developments of the openwifi project with high interest and I have successfully started the new release Notter 1.4.0 by using the "zed_fmcs2-board" and the "zcu102_fmcs2-bo…
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Why does the driver read the user BAR at address 0x2000 0x3000?!
It shouldn't even try to access the user BAR at all. It breaks the whole Xilinx/AMD AXI interconnect since these addresses aren't mapp…
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Hi jeremy,
I use petalinux v2016.3 to contain the source code of ezdma.c in my created module. Once the linux on board booted, I typed "insmod /lib/modules/'uname -r'/extra/ezdma.ko" or "modprobe e…
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Hi Jeremy,
I'm trying to DMA very large buffers (512M byte if I can) into memory. I seem to run into a memory problem for sg_alloc_table if I try to create a DMA buffer > 1Mbyte. I believe I just hav…
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I've currently got a design set up using the `pcie_us_axi_dma` as the sole user of the PCIe requester interface. This works just as I'd expect and I can DMA between the device and the host, but the de…
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I'm planning to use your DMAs in a high performance design. Since DDR delivers data after several clocks, it would be ideal if the DMA can issue multiple outstanding AXI transactions, without waiting …
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Hi,
I test the hardware algorithm in 4.14.0-xilinx, and compare with software algorithm.
By the following result, I thik that AXI communication consume too much cycles.
Maybe reduce them, especiall…
55-AA updated
4 years ago
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Hi.
I'm writing a DMA driver for my hardware. I don't know about parameter was set on FPGA. Your code works well in user-space. I tried you your code in my driver, but it cannot run `get_user_pages_f…
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The Rx buffer address location within the FlashMsg[x] struct (RxAddr64bit) is never set.
Value should be set to Destination Address (such as from `u32 XFsbl_Qspi32Copy(u32 SrcAddress, PTRSIZE DestA…