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I own a N16R8 version for example
```ini
; change flashsize
board_upload.flash_size = 16MB
board_build.partitions = default_16MB.csv
```
It seems to work. Although pio seems to think that the am…
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I want to program the PL part of ZYNQ, but I need a backup of the bitstream. Where can I get it from? If you think about it, LibreSDR is a clone of PlutoSDR, but does that mean that a project for Viva…
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We are running Zephyr on a STM32L486 based system, using SST26VF032B QSpi flash.
The flash erase function works unstable.
After going deep down into the flash_stm32_qspi.c driver, we can see that…
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I am closing this issue, because it is more of a misunderstanding of mine.
The script check_qspi_crc in the release of db48x/tools refers to crc32 (line 27) but there seems to be no crc32 program…
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Try to flash the TE0711 Model, which is Using Xilinx Arty xc7a100tcsg324 chip, with S25FL256S QSPI chip. Checked the constrain files, they are using same as the /usr/local/share/openFPGALoader/spiOver…
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https://github.com/starfive-tech/JH7100_secondBoot/blob/f93f109c75ee75fe404a710a92eb9bac31eb7ec9/spi/cadence_qspi.c#L15
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I am using a [bootlin](https://toolchains.bootlin.com/) RISC-V toolchain (GCC 10.2.0, binutils 2.34) to build second boot.
First of all, this toolchain does not support nano specs, and I had to do …
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Most should be straight forward. The safety of rtos_qspi_flash_read_ll() needs to be evaluated once implementation is in, but it appears safe from quick glance.
Functional benchmarking and verifica…
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If the QSPI driver / auxflash task think they have a much larger chip than they actually have, they may issue out-of-range requests, which appears to stall the driver.
The bringup team patched the …
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During the copy operation of `helper.py`, the source code can be opened and modified by the `rewrite_replace` function. This is not ideal of the project name is, say, `QSPI`, and a macro is called `DS…