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CTSRD-CHERI / SIMTight

Synthesisable SIMT-style RISC-V GPGPU
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Stat `VecRegs` too high when `SIMTEnableScalarUnit` enabled #13

Closed mn416 closed 2 years ago

mn416 commented 2 years ago

Likely that the stat is no longer correct as there still seems to be plenty of scalar regs in use.