While investigating the Missing read/write records invariant error #7050, we found that asynchronous signal, i.e. SIGPROF, was delivered mid-block instead of at the end of a block.
Expected behavior
Signals which are marked as true in the can_always_delay array should be delivered at the end of a block instead of mid-block.
Versions
What version of DynamoRIO are you using? The latest.
While investigating the Missing read/write records invariant error #7050, we found that asynchronous signal, i.e. SIGPROF, was delivered mid-block instead of at the end of a block.
Expected behavior Signals which are marked as true in the can_always_delay array should be delivered at the end of a block instead of mid-block.
Versions
Additional context Xref https://github.com/DynamoRIO/dynamorio/issues/5063. There is drmemtrace discussion there: https://github.com/DynamoRIO/dynamorio/issues/5063#issuecomment-920147671. However, as that issue says, a regular asynch signal would be delayed and would be delivered in between the two blocks.
If this were a real interruption of a block: it would hit https://github.com/DynamoRIO/dynamorio/issues/5790 or https://github.com/DynamoRIO/dynamorio/issues/5063.