Provide example instantiation of CPU in data sheet documentation.

KestrelComputer / polaris

RISC-V RV64IS-compatible processor for the Kestrel-3

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Provide example instantiation of CPU in data sheet documentation. #14

Closed sam-falvo closed 7 years ago

sam-falvo commented 7 years ago

Datasheet assumes the user knows how to instantiate the processor in Verilog. And they probably do. However, in the interests of professionalism, I'd like to see an example Verilog application of the processor included in the data sheet showing how it's typically used.

sam-falvo commented 7 years ago

[ ] Simple RAM memory; 4KB ought to be way more than enough for our needs (512 x 64b).
[x] Simple ROM memory; 4KB ought to be plenty (1024 x 32b)
[x] Simple console I/O port.
- [x] Character output port (prints character to screen)
- [x] Bit that exits the simulation.
- [x] Custom CSR registers to demo the C-port?
[x] Simple address decoder.
[x] A simple hello-world type application that prints to the screen and exits the simulation.
[ ] Memory bus bridge
[x] Processor binding.