What does this PR do?
Implemented ADC 1 & 2 using low level STM32 APIs.
DTS, Kconfig and pinmux configurations of "mppt_2420_hpx" board are also changed for the future support of ADC2 in Zephyr framework.
What are the relevant tickets?
NA
Where should the reviewer start?
The file daq_zephyr.c
How should this be manually tested?
ADC 1 & 2 values must be updated automatically by DMA interrupt routines.
Any background context you want to provide?
The STM32 LL drivers are used to implement ADC since the Zephyr drivers do not support ADC2 yet.
Once the Zephyr updates this, we may switch back to the zephyr APIs.
What does this PR do? Implemented ADC 1 & 2 using low level STM32 APIs. DTS, Kconfig and pinmux configurations of "mppt_2420_hpx" board are also changed for the future support of ADC2 in Zephyr framework.
What are the relevant tickets? NA
Where should the reviewer start? The file daq_zephyr.c
How should this be manually tested? ADC 1 & 2 values must be updated automatically by DMA interrupt routines.
Any background context you want to provide? The STM32 LL drivers are used to implement ADC since the Zephyr drivers do not support ADC2 yet. Once the Zephyr updates this, we may switch back to the zephyr APIs.