kotopes
commented
1 week ago set_location_assignment PIN_30 -to a3
set_location_assignment PIN_28 -to a13
module EPM3032_YM2149x2 (
input a0, a1, a2, a3, a13, a14, a15,
// Вариант с дешифрацие с учетом rd. Возможно это первое место по нечитаемому написанию...
wire ssg = iorq | ~a0 | a1 | ~a2 | ~a3 | ~a13 | ~a15 | ~m1; // added full port decode (+ a0/a2/a3/a13)
assign bdir = (ssg)?(1'b0):( ( (((a14==0)&(wr==0)&(rd==1)) | ((a14==1))&(wr==0)&(rd==1)) )?(1'b1):(1'b0) ); // #bffd
assign bc1 = (ssg)?(1'b0):( ( (((a14==1)&(wr==0)&(rd==1)) | ((a14==1))&(wr==1)&(rd==0)) )?(1'b1):(1'b0) ); // #fffd_full with #dffd compat
need add A13 and check it in '1' state for #dffd port compatibility part from multisound cpld: `/ TURBO SOUND FM / wire port_bffd = a[15:14] == 2'b10 && a[3:0] == 4'b1101 && ym_ena; // bdir wire port_fffd = a[15:14] == 2'b11 && a[3:0] == 4'b1101 && ym_ena; // bc1 wire port_fffd_full = a[15:13] == 3'b111 && a[3:0] == 4'b1101 && ym_ena; // bc1 a13 required for compatibility with #dffd port reg ym_chip_sel, ym_get_stat; wire ym_a0 = (~n_rd & a[14] & ~ym_get_stat) | (~n_wr & ~a[14]); assign n_ym1_cs = ~(~ym_chip_sel && (port_bffd || port_fffd)); assign n_ym2_cs = ~( ym_chip_sel && (port_bffd || port_fffd));
always @(posedge clk32 or negedge rst_n) begin if (!rst_n) begin ym_chip_sel <= 0; ym_get_stat <= 0; fm1_ena <= 0; fm2_ena <= 0; end else if (port_fffd && ioreq_wr && d[7:4] == 4'b1111) begin ym_chip_sel <= d[0]; ym_get_stat <= ~d[1]; fm1_ena <= d[2]? 1'b0 : 1'bz; fm2_ena <= d[2]? 1'b0 : 1'bz; end end
assign ym_m = clk3_5; `