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NVlabs / timeloop

Timeloop performs modeling, mapping and code-generation for tensor algebra workloads on various accelerator architectures.
https://timeloop.csail.mit.edu/
BSD 3-Clause "New" or "Revised" License
324 stars 101 forks source link

Data layout #276

Open zzczzc20 opened 2 months ago

zzczzc20 commented 2 months ago

Hello! I am a beginner to Timeloop and I want to know whether the data mapping generated by timeloop requires special data layout to gain a good performance. I observed that sometimes the mapping generated by timeloop can lead to significant bandwidth under-utilization in my simulator.

Best, Denton

angshuman-parashar commented 1 week ago

Hi Denton -- your observation is correct. We will be implementing layout modeling in a future release, thanks to Jianming Tong's work on LayoutLoop: https://arxiv.org/abs/2405.13170