Quuxplusone
commented
7 years ago The MIPS backend currently marks the AT register as clobbered for branch instructions due to the implementation of the long branch pass. The AT register is required to compute the jump target when the target of the branch is out of range of the branch.
LLVM when targeting MIPS doesn't (or at least for MIPS32/MIPS64) produce macros as the assembly produced is in nomacro, noreorder, noat mode. LLVM considers AT a normal register.
I have a possible solution to not clobbering the AT register, but it requires reworking aspects of the long branch pass. To sketch it out, the implicit def of at is removed from branches. The long branch pass will modify the stack pointer to provide a spill slot for AT, the branch target will be computed in AT and we perform an indirect jump as normal. At the branch target, we insert an unconditional branch with a nop, followed by the reload of AT, and remove the spill slot from the stack.
Another approach maybe to see if it's possible to adjust the branch coalescing pass to tolerate cases where branches have implicit operands.
The mips backend marks the AT (assembler temporary) register as clobbered for branch instructions. This prevents the branch coalescing pass from coalesing the branch because of the implicit def of AT. LLVM should not be producing assembler macros, and should treat the AT register as any other register. We should be compiling to the chip, and not to the assembler.