Open Quuxplusone opened 4 years ago
Bugzilla Link | PR47667 |
Status | NEW |
Importance | P enhancement |
Reported by | Yoshinobu Oono (fj8765ah@aa.jp.fujitsu.com) |
Reported on | 2020-09-28 02:23:54 -0700 |
Last modified on | 2021-03-30 22:51:33 -0700 |
Version | trunk |
Hardware | PC Linux |
CC | david.green@arm.com, hfinkel@anl.gov, llvm-bugs@lists.llvm.org, llvm@meinersbur.de, t-kawashima@fujitsu.com, utsumi.yuichiro@fujitsu.com |
Fixed by commit(s) | |
Attachments | |
Blocks | |
Blocked by | |
See also |
Unfortunately there is not distinct metadata for interleaving and vectorization. The separe pragmas only make it appear as if these are separate options.
llvm.loop.vectorize.enable forces only one of the transformations by the LoopVectorize pass: either interleave of vectorize (it might also only interpret is as only forcing vectorization with a width >=2, not sure about the details). In any case case, since you did not specify the interleaving factor, the cost model can chose an interleave factor of 1 when vectorizing.
Hi Michael,
I am sorry for my late reply.
Thank you for an answer.
Let me confirm one thing.
When should I use "# pragma clang loop interleave (enable)"?
I couldn't think of how to use it with the current behavior.
IMHO there are two use cases for interleaving (or optimizations in general):
1. One wants a specific interleave count and specify it using #pragma clang
loop interleave_count(<n>)
2. One does not know which interleave count and relies on compiler heuristics.
Do not pass a program in this case, the compiler will chose itself, including
an interleave count of one (i.e. no interleaving).
That is, I don't see a use case for a standalone #pragma clang loop
interleave(enable), even if it was representable with the current loop metadata.
Hi Michael,
Thank you for your answer.
Your answer was the same as what I think.
I think the interleaving behavior should change from loop to loop.
I hope that "# pragma clang loop interleave (enable)" will become a meaningful
pragma in the future.