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Ravenslofty
/
mistral
Cyclone V bitstream reverse-engineering project
BSD 3-Clause "New" or "Revised" License
111
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15
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Fix some issues affecting the nextpnr build
#21
gatecat
closed
2 years ago
0
[question] Cyclone IV compatibility
#20
matsievskiysv
closed
2 years ago
1
failed when build
#19
baiyunping333
closed
2 years ago
2
Firmware dump
#18
ericlewis
closed
2 years ago
1
Bitstream does not run on 5CEFA5F23I7 , missing CMUXVG and CMUXHG statement ?
#17
infphyny
closed
2 years ago
11
Could you provide instructions and an small example?
#16
rodrigomelo9
opened
3 years ago
2
Let cmake find python3
#15
mmicko
closed
3 years ago
0
libmistral: Use ld instead of objcopy for binary objects
#14
gatecat
closed
3 years ago
0
libmistral: Make it possible to include in nextpnr
#13
gatecat
closed
3 years ago
0
EF_SEL inputs
#12
gatecat
closed
2 years ago
1
Mapping of LAB-wide control signals to DATAIN
#11
gatecat
closed
2 years ago
1
T/BCLK_SEL bits
#10
gatecat
closed
2 years ago
1
*PKREG* bits mirrored
#9
gatecat
opened
3 years ago
1
lib: Allow looking up pins by name
#8
gatecat
closed
3 years ago
0
Initial changes for nextpnr support
#7
gatecat
closed
3 years ago
2
Fix build by including <array>
#6
ErikAndren
closed
3 years ago
0
cyclonev.h needs a pos_t to BEL lookup function
#5
Ravenslofty
closed
3 years ago
1
cyclonev_clkena
#4
Ravenslofty
opened
5 years ago
2
Misc rbf utils
#3
goddessfreya
closed
5 years ago
2
cyclonev_mac cell
#2
Ravenslofty
opened
5 years ago
1
synth_intel uses M9K cells for all architectures
#1
Ravenslofty
closed
5 years ago
0