Fix assert_param(IS_RCC_PERIPHCLOCK.... #37

[SergeiSOficial]

for https://github.com/STMicroelectronics/STM32CubeWB/issues/37

fix missing RCC_PERIPHCLK_CLK48SEL For RNG module used CLK48. Fix assert_param for this param if defined USE_FULL_ASSERT

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[RKOUSTM]

Hi @SergeiSOficial,

Thank you for your reports. Your request will be forwarded to our development teams. We will be back to you as soon as we get an answer.

Thank you again for you reports.

With regards,

[RKOUSTM]

ST Internal Reference: 112663

[RKOUSTM]

Hi @SergeiSOficial,

Thank you for having reported this point. According to our development team, the CLK48 clock can be used by USB or/and RNG peripherals. In HAL the configuration of the CLK48 mux (to select the CLK48 clock source) is part of the RNG/USB clock source selection, i.e. from HAL RCC user perspective CLK48 mux and RNG mux are seen as one single mux. In the HAL_RCCEx_PeriphCLKConfig() function, wrong CLK48 configuration is checked by IS_RCC_USBCLKSOURCE or/and by IS_RCC_RNGCLKSOURCE, so there is no need to check it in IS_RCC_PERIPHCLOCK. Therefore there is no need to add RCC_PERIPHCLK_CLK48SEL to the RCC_PERIPHCLOCK_ALL constant definition. However, during code review of this issue, we found out that we are missing the PLLSAI clock source for the RNG Clock Source. So, an internal tracker has been logged and a fix will be implemented and made available in the frame of a future release.

With regards,

 /** @defgroup RCCEx_RNG_Clock_Source RNG Clock Source
  * @{
  */
 #define RCC_RNGCLKSOURCE_HSI48         (CLK48_MASK | LL_RCC_CLK48_CLKSOURCE_HSI48)  /*!< HSI48 clock divided by 3 
 selected as RNG clock    */
 #define RCC_RNGCLKSOURCE_PLL           (CLK48_MASK | LL_RCC_CLK48_CLKSOURCE_PLL)    /*!< PLL "Q" clock divided by 3  
 selected as RNG clock */
 #define RCC_RNGCLKSOURCE_MSI           (CLK48_MASK | LL_RCC_CLK48_CLKSOURCE_MSI)    /*!< MSI clock divided by 3 
 selected as RNG clock      */
+#if defined(SAI1)
+#define RCC_RNGCLKSOURCE_PLLSAI1       (CLK48_MASK | LL_RCC_CLK48_CLKSOURCE_PLLSAI1)    /*!< PLLSAI1 "Q" clock +selected as RNG clock           */
+#endif
 #define RCC_RNGCLKSOURCE_CLK48         LL_RCC_RNG_CLKSOURCE_CLK48                   /*!< CLK48 divided by 3 selected as 
 RNG Clock          */
 ...
 /**
   * @}
   */

[RKOUSTM]

ST Internal Reference: 115371