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SiEPIC / SiEPIC-Tools

Package for KLayout to add integrated optics / silicon photonics functionality (waveguides, netlist extraction, circuit simulations, etc)
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no result in interconnect!!! #219

Open mahdijavid opened 3 weeks ago

mahdijavid commented 3 weeks ago

When we simulate our design in Lumerical interconnect why sometimes we get "no result" message when we try to plot the results while DRC and LVS are passed with no errors? image test.zip

mahdijavid commented 3 weeks ago

@lukasc-ubc @mustafacc

mustafacc commented 3 weeks ago

It's possible to get empty results while passing DRC and verification. What does the INTC circuit and GDS look like?

mahdijavid commented 3 weeks ago

I already attached a photo of intc circuit and my gds file

mustafacc commented 3 weeks ago

Looks like the input source polarization is TE while the GC is TM.

mahdijavid commented 3 weeks ago

I tried to make all TE But problem is not solved TEST2.zip IMG_20240822_215015_056 IMG_20240822_215013_760

mahdijavid commented 3 weeks ago

@mustafacc