SiliconLabs / wiseconnect

Next-generation Silicon Labs Wi-Fi API for SiWx91x chipset family.
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pin_tool always generate GPIO port = 0 #17

Closed silabs-HopN closed 3 days ago

silabs-HopN commented 2 months ago

Hi team,

I created a component to work with Si917. This component has a config file which allows users can modify the GPIO port and pin as picture below. image

Unfortunately pin_tool always generate port=0 for any selected pin. For example, when GPIO_10 is selected, PORT = 0 and PIN = 10. But when ULP_GPIO_10 is selected, the result is still PORT = 0 (expect PORT = 4) and PIN = 10. This is the reason why my code doesn't know GPIO_10 or ULP_GPIO_10 selected.

Below is snip code of the config file

// <<< sl:start pin_tool >>>

// <gpio optional=true> WATER_DETECT_INT
// $[GPIO_WATER_DETECT_INT]
#define WATER_DETECT_INT_PORT                        0 // PORT = 2 is invalid
#define WATER_DETECT_INT_PIN                         46
// [GPIO_WATER_DETECT_INT]$

// <<< sl:end pin_tool >>>
Silabs-Tarun commented 1 month ago

With the latest release it is updated, please check and get back to us.

silabs-HopN commented 3 days ago

It worked well. Thanks team.