SingleStepTests / ProcessorTests

A language-agnostic JSON-encoded instruction-by-instruction test suite for the 8088, 68000, 65816, 65[c]02 and SPC700 that includes bus activity.
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65816: (dp,x) emulation mode page wrapping #40

Closed ElectronicsTinkerer closed 1 year ago

ElectronicsTinkerer commented 1 year ago

(dp,x) emulation mode page wrapping

According to this, the (dp,x) addressing mode should only page wrap "When the e flag is 1 and the DL register is $00 (both conditions must be met)." This behavior is supported by the hardware tests below. The ProcessorTests (as of commit 96c2ca8) does not follow this logic. Take for example test "01 e 3". D=$d873 (DL=$73), X=$dd, and the dp index (operand) is $19. The address should not be wrapped since DL != 0, resulting in a pointer address of $d969. The test case, however page wraps and places the pointer at $d869. From what I can tell, this affects every instruction which allows the (dp,x) addressing mode.

Hardware test results for DL != 0

Test condition: "01 e xx" Verdict: (dp,x) does not page wrap (resulting value for test in address $102 is $F5)

Source code:


DREG        .equ $70f1          ; From the "01 e 4" test case
;; DREG        .equ $7000

stack_save  .equ $1000

    .as
    .org 0
    lda #0                      ; Set the DBR to a known value
    pha
    plb
    .al
    rep #$20                    ; Save the stack so we can return to MONTIOR
    tsc
    sta >stack_save
    lda #DREG
    pha
    pld
    lda #$0100                  ; Address
    sta DREG+$24+$fa            ; Assuming no bank wrapping
    lda #$0101                  ; Address
    sta {DREG & $ff00} | {{{DREG & $ff}+$24+$fa} & $ff} ; Assuming bank wrapping
    .as
    sec                         ; Emulation mode
    xce
    .as
    .xs
    ;; ENTER EMULATION MODE

    ;; TEST: "01 e xx"
    lda #$a0
    sta $100
    lda #$0a
    sta $101

    ldx #$fa

    lda #$55
    ora ($24,x)
    sta $102
    tax                         ; Save return value

    ;; EXIT EMULATION MODE
    clc                         ; Back to Native mode
    xce

    .al
    rep #$20
    lda >stack_save             ; Restore stack
    tcs
    txa                         ; Get return value
    rtl                         ; MONITOR prints A on return

Hardware trace:

[ ZEDIAC ] > 0.3c
        00 01 02 03 04 05 06 07  08 09 0A 0B 0C 0D 0E 0F
000000: A9 00 48 AB C2 20 3B 8F  00 10 00 A9 F1 70 48 2B  ..H.. ;......pH+
000010: A9 00 01 8D 0F 72 A9 01  01 8D 0F 70 38 FB A9 A0  .....r.....p8...
000020: 8D 00 01 A9 0A 8D 01 01  A2 FA A9 55 01 24 8D 02  ...........U.$..
000030: 01 AA 18 FB C2 20 AF 00  10 00 1B 8A 6B 00 00 00  ..... ......k...

[ ZEDIAC ] > 100
        00 01 02 03 04 05 06 07  08 09 0A 0B 0C 0D 0E 0F
000100: 00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................

[ ZEDIAC ] > 7000.7010
        00 01 02 03 04 05 06 07  08 09 0A 0B 0C 0D 0E 0F
007000: 00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
007010: 00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................

[ ZEDIAC ] > 7200.7210
        00 01 02 03 04 05 06 07  08 09 0A 0B 0C 0D 0E 0F
007200: 00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
007210: 00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................

[ ZEDIAC ] > gosub 0
245
[ ZEDIAC ] > 100
        00 01 02 03 04 05 06 07  08 09 0A 0B 0C 0D 0E 0F
000100: A0 0A F5 00 00 00 00 00  00 00 00 00 00 00 00 00  ................

[ ZEDIAC ] > 7000.7010
        00 01 02 03 04 05 06 07  08 09 0A 0B 0C 0D 0E 0F
007000: 00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 01  ................
007010: 01 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................

[ ZEDIAC ] > 7200.7210
        00 01 02 03 04 05 06 07  08 09 0A 0B 0C 0D 0E 0F
007200: 00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
007210: 01 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................

Hardware test results for DL == 0

Test condition: "01 e xx" Verdict: (dp,x) does page wrap (resulting value for test in address $102 is $5f)

Source code: <same as above, except that DREG is set to $7000>

Hardware trace:

[ ZEDIAC ] > 0.3c
        00 01 02 03 04 05 06 07  08 09 0A 0B 0C 0D 0E 0F
000000: A9 00 48 AB C2 20 3B 8F  00 10 00 A9 00 70 48 2B  ..H.. ;......pH+
000010: A9 00 01 8D 1E 71 A9 01  01 8D 1E 70 38 FB A9 A0  .....q.....p8...
000020: 8D 00 01 A9 0A 8D 01 01  A2 FA A9 55 01 24 8D 02  ...........U.$..
000030: 01 AA 18 FB C2 20 AF 00  10 00 1B 8A 6B 00 00 00  ..... ......k...

[ ZEDIAC ] > 100
        00 01 02 03 04 05 06 07  08 09 0A 0B 0C 0D 0E 0F
000100: 00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................

[ ZEDIAC ] > 7010
        00 01 02 03 04 05 06 07  08 09 0A 0B 0C 0D 0E 0F
007010: 00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................

[ ZEDIAC ] > 7110
        00 01 02 03 04 05 06 07  08 09 0A 0B 0C 0D 0E 0F
007110: 00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................

[ ZEDIAC ] > gosub 0
95
[ ZEDIAC ] > 100
        00 01 02 03 04 05 06 07  08 09 0A 0B 0C 0D 0E 0F
000100: A0 0A 5F 00 00 00 00 00  00 00 00 00 00 00 00 00  .._.............

[ ZEDIAC ] > 7010
        00 01 02 03 04 05 06 07  08 09 0A 0B 0C 0D 0E 0F
007010: 00 00 00 00 00 00 00 00  00 00 00 00 00 00 01 01  ................

[ ZEDIAC ] > 7110
        00 01 02 03 04 05 06 07  08 09 0A 0B 0C 0D 0E 0F
007110: 00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 01  ................