Currently, when an FPGA gets the wrong bit file on power up, the server retries the power up command in the whole set of boards that were passed to the function. This is not optimal as a different board could fail in the second attempt and so on.
It would be better to power-cycle the failing board only.
file: async_bmp_controller.py function: _set_board_state
Currently, when an FPGA gets the wrong bit file on power up, the server retries the power up command in the whole set of boards that were passed to the function. This is not optimal as a different board could fail in the second attempt and so on.
It would be better to power-cycle the failing board only.