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SpinalHDL / NaxRiscv

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NaxRiscv gets the wrong value when reading from `scause` #100

Closed zhangkanqi closed 6 months ago

zhangkanqi commented 6 months ago

Environment: commit id: 6af1a20158f6402196c1f17f47680b96e0a88b86

Description: The instructions are as follows: (from spike.log)

(1) Set scause to 0xc0010; (2) Then encounters an illegal_instruction exception; (3) Read scause and get value 0xc0010;

NaxRiscv does the same as Spike in step (1) and (2). However, NaxRiscv gets 0x0 in step (3) while Spike gets the expected value 0xc0010.

For debug and reproduce: input_6.zip

./obj_dir/VNaxRiscv --load-elf=./input_nax_6.elf --start-symbol=_start --pass-symbol=write_tohost --timeout=99999 --name=input_nax_6 --trace --trace-ref --spike-debug

I have no idea why NaxRiscv gets 0x0 when reading scause. Could you help me solve this problem?

Dolu1990 commented 6 months ago

Hi,

scause is implemented with bits XLEN-1 and 3:0 All the other bits are hard wired to 0.

Which is a valid implementation, scause shouldn't be used to store arbitrary value.

zhangkanqi commented 6 months ago

Thanks for your reply. Did you mean that scause can be wrote by any value in M-mode(in this case, the value read from scaure is zero), but actually NaxRiscv only supports to modify scause when encounter exception in S-mode(in this case, the value read from scaure is the exception code)?

Dolu1990 commented 6 months ago

I meant that only a few bits of mcause/scause are implemented. Those bits can be read write by both the hardware and the software

zhangkanqi commented 6 months ago

Oh! I see! 🤦‍♀️ 0xc0010 didn't affect the last four bits of scause. So the value read from scause is zero. Thanks for your prompt response again.