StanfordAHA / CGRAMapper

CoreIR based mapping tool for CGRA
BSD 3-Clause "New" or "Revised" License
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ERROR: NYI: subselecting from a primitive #45

Open leonardt opened 6 years ago

leonardt commented 6 years ago
❯ cgra-mapper test_DefineSub16.json test_DefineSub16_mapped.json
Loading test_DefineSub16.json
Running Pass: rungenerators
In Run Generators
Done running generators
Running Pass: verifyinputconnections
Running Pass: verifyconnectivity-onlyinputs-noclkrst
Running Pass: removebulkconnections
Running Pass: verifycanmap
ERROR: NYI: subselecting from a primitive

0   cgra-mapper                         0x0000000104ef7e37 _ZN12MapperPasses12VerifyCanMap13runOnInstanceEPN6CoreIR8InstanceE + 4455
1   libcoreir.dylib                     0x0000000105351c37 _ZN6CoreIR11PassManager15runInstancePassEPNS_4PassE + 4103
2   libcoreir.dylib                     0x0000000105352f7a _ZN6CoreIR11PassManager7runPassEPNS_4PassE + 442
3   libcoreir.dylib                     0x00000001053563c3 _ZN6CoreIR11PassManager3runENSt3__16vectorINS1_12basic_stringIcNS1_11char_traitsIcEENS1_9allocatorIcEEEENS6_IS8_EEEESA_ + 5075
4   libcoreir.dylib                     0x0000000105191996 _ZN6CoreIR7Context9runPassesENSt3__16vectorINS1_12basic_stringIcNS1_11char_traitsIcEENS1_9allocatorIcEEEENS6_IS8_EEEESA_ + 150
5   cgra-mapper                         0x0000000104f1cb81 main + 10737
6   libdyld.dylib                       0x00007fff6f55f115 start + 1

DefineSub16.json

{"top":"global.Sub16",
"namespaces":{
  "global":{
    "modules":{
      "Add16_cin":{
        "type":["Record",[
          ["I0",["Array",16,"BitIn"]],
          ["I1",["Array",16,"BitIn"]],
          ["O",["Array",16,"Bit"]],
          ["CIN","BitIn"]
        ]],
        "instances":{
          "bit_const_GND":{
            "modref":"corebit.const",
            "modargs":{"value":["Bool",false]}
          },
          "inst0":{
            "genref":"coreir.add",
            "genargs":{"width":["Int",16]}
          },
          "inst1":{
            "genref":"coreir.add",
            "genargs":{"width":["Int",16]}
          }
        },
        "connections":[
          ["bit_const_GND.out","inst1.in0.1"],
          ["bit_const_GND.out","inst1.in0.10"],
          ["bit_const_GND.out","inst1.in0.11"],
          ["bit_const_GND.out","inst1.in0.12"],
          ["bit_const_GND.out","inst1.in0.13"],
          ["bit_const_GND.out","inst1.in0.14"],
          ["bit_const_GND.out","inst1.in0.15"],
          ["bit_const_GND.out","inst1.in0.2"],
          ["bit_const_GND.out","inst1.in0.3"],
          ["bit_const_GND.out","inst1.in0.4"],
          ["bit_const_GND.out","inst1.in0.5"],
          ["bit_const_GND.out","inst1.in0.6"],
          ["bit_const_GND.out","inst1.in0.7"],
          ["bit_const_GND.out","inst1.in0.8"],
          ["bit_const_GND.out","inst1.in0.9"],
          ["inst0.in0","inst1.out"],
          ["inst0.in1","self.I1"],
          ["inst0.out","self.O"],
          ["inst1.in1","self.I0"],
          ["self.CIN","inst1.in0.0"]
        ]
      },
      "Invert16_wrapped":{
        "type":["Record",[
          ["I",["Array",16,"BitIn"]],
          ["O",["Array",16,"Bit"]]
        ]],
        "instances":{
          "inst0":{
            "genref":"coreir.not",
            "genargs":{"width":["Int",16]}
          }
        },
        "connections":[
          ["inst0.in","self.I"],
          ["inst0.out","self.O"]
        ]
      },
      "Sub16":{
        "type":["Record",[
          ["I0",["Array",16,"BitIn"]],
          ["I1",["Array",16,"BitIn"]],
          ["O",["Array",16,"Bit"]]
        ]],
        "instances":{
          "bit_const_VCC":{
            "modref":"corebit.const",
            "modargs":{"value":["Bool",true]}
          },
          "inst0":{
            "modref":"global.Invert16_wrapped"
          },
          "inst1":{
            "modref":"global.Add16_cin"
          }
        },
        "connections":[
          ["bit_const_VCC.out","inst1.CIN"],
          ["inst0.I","self.I1"],
          ["inst0.O","inst1.I1"],
          ["inst1.I0","self.I0"],
          ["inst1.O","self.O"]
        ]
      }
    }
  }
}
}
rdaly525 commented 6 years ago

This is a difficult example to map. The simplest thing is to not use the 16 bit part of the ALU.

leonardt commented 6 years ago

Might be a bit contrived, I should update mantle to use the coreir sub primitive