Schematic viewer with GHDL/Yosys cannot find work lib

[atticlabsdesign]

I am using VHDL and when I try and use the schematic viewer it works fine with entities in their own file but when i create an instance of a entity in another file GHDL fails to find the work lib. This is only a problem for me as it relates to the yosys schematic viewer, I can successfully run test benches with GHDL no problem. I have tried specifying the work directory with an absolute path in the schematic viewer settings (in the arguments passed to GHDL box) and it still fails.

yosys error (without any settings being messed with below)

2024-09-13 21:13:32.592 [info] 
 /----------------------------------------------------------------------------\
 |  yosys -- Yosys Open SYnthesis Suite                                       |
 |  Copyright (C) 2012 - 2024  Claire Xenia Wolf <claire@yosyshq.com>         |
 |  Distributed under an ISC-like license, type "license" to see terms        |
 \----------------------------------------------------------------------------/
 Yosys 0.38+141 (git sha1 078b876f5, clang++ 14.0.0-1ubuntu1.1 -fPIC -Os)

-- Running command `ghdl --std=08 -fsynopsys  --work=work /home/attic_labs/Documents/HDL_PROJ/SCC/Manchester_Encoder_tb.vhd  --work=work -e Manchester_Encoder_tb; hierarchy -top Manchester_Encoder_tb; proc; ; write_json /home/attic_labs/.teroshdl_leKKC; stat' --

1. Executing GHDL.

2024-09-13 21:13:32.603 [info] /home/attic_labs/Documents/HDL_PROJ/SCC/Manchester_Encoder_tb.vhd:23:41: unit "manchester_encoder" not found in library "work"
  Manchester_Encoder_inst : entity work.Manchester_Encoder
                                        ^

2024-09-13 21:13:32.603 [info] ERROR: vhdl import failed.

2024-09-13 21:13:32.605 [error] Yosys failed.

See Attached Files for code and settings

• System: Operating System: Kubuntu 22.04 KDE Plasma Version: 5.24.7 KDE Frameworks Version: 5.92.0 Qt Version: 5.15.3 Kernel Version: 6.8.0-40-generic (64-bit) Graphics Platform: X11 Processors: 12 × Intel® Core™ i7-8750H CPU @ 2.20GHz Memory: 15.5 GiB of RAM Graphics Processor: Mesa Intel® UHD Graphics 630

• VSCode: Version: 1.93.0 Commit: 4849ca9bdf9666755eb463db297b69e5385090e3 Date: 2024-09-04T13:02:38.431Z Electron: 30.4.0 ElectronBuildId: 10073054 Chromium: 124.0.6367.243 Node.js: 20.15.1 V8: 12.4.254.20-electron.0 OS: Linux x64 6.8.0-40-generic snap

-TerosHDL: v6.0.3 (pre-release)

Screenshots If applicable, add screenshots to help explain your problem. Share the code as text, not as a screenshots!

Teros HDL bug report.zip

[atticlabsdesign]

I realize that the config file shows I passed an absolute path to the regular test bench GHDL command, don't worry I realized this was wrong and really did try it in the schematic viewer version and it didnt work, i just forgot to remove that before copying the files

[qarlosalberto]

Make sure that you aren't using a file with whitespaces in the path. And that your code is synthesizable. For example your testbench will fail because the code is'nt synthesizable.