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ThalesGroup / cva6-softcore-contest

National RISC-V student contest CV32A6
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Bump verif/core-v-verif from `6779193` to `c7d2077` #25

Closed dependabot[bot] closed 9 months ago

dependabot[bot] commented 9 months ago

Bumps verif/core-v-verif from 6779193 to c7d2077.

Commits
  • c7d2077 Merge pull request #2358 from MarioOpenHWGroup/feature/rvfi_decouple
  • f96ece8 [SPIKE] Add another patch for hartid
  • 4239df0 Spike modifications
  • fd68dfd Merge pull request #2361 from ThalesSiliconSecurity/csr_pseudo
  • a24f2a5 Spike-disasm : fix CSR pseudo code
  • aa5fe84 Merge pull request #2350 from MarioOpenHWGroup/feature/tandem-upgrade
  • 81926e6 Typo correction and patch update
  • 568575b Merge pull request #2360 from GTumbush/illegal_instruction_test_script
  • d87679a Illegal instuction generator for CV32E40P V1
  • c692149 Update riscv-isa-sim patches
  • Additional commits viewable in compare view


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dependabot[bot] commented 9 months ago

The following labels could not be found: Component:Verif.

dependabot[bot] commented 9 months ago

Superseded by #26.