Open noisemaker00 opened 3 years ago
Is it possible for you to attach a picture? i am using eagle(9.6.2) too and it works fine for me
I have the same experience. I believe it happens when the silkscreen layer extends outside the bounds of the board outline.
I'm having the same issue, using both Eagle 7.6 and KiCad 5.1.9: I'm trying to merge 3 boards (one of them with 2 instances), only one of the boards gets the silkscreen properly. All of the PCBs are 4 layers. I'm attaching the files for inspection, all of them are from Open Source projects. combined.zip Arduino_Micro.zip StepStick_Elecrow.zip V0_Display.zip
EDIT: upon more tests, I was able to get all the silkscreen correctly, but I had to ditch Eagle and use KiCad exclusively. One more reason to ditch Eagle definitely, I must say.
EDIT 2: tried again, including a 4th board (no repeated instances this time), this time only two PCBs got the silkscreen, the other two are blank. This bug is very annoying and inconsistent.
EDIT 3: Looks like the behavior described by ckemere is the real problem. Made a new merge, positioned all the boards inside a 100mm × 100mm board near the center, with the gap filling option turned on. With all PCBs well inside the merged board outline all the individual silkscreens are now present.
EDIT 4: And now it stopped working again, only one PCB out of 4 have a silkscreen. I simply don't know how to circumvent the bug in a reliable way, if there is such a thing.
Try using https://github.com/StanislavJochman/GerberTools_Eagle_Fix
If the issue were only about proper file names, I would have solved that myself long ago. I've been renaming manually some files, specially drill files from KiCad. Everything works, except both silkscreen files. This is a bug, and a very annoying one, since there is no open source tool for Gerber editing so I could manually place the silkscreen on the combined board.
Try using https://github.com/StanislavJochman/GerberTools_Eagle_Fix
If the issue were only about proper file names, I would have solved that myself long ago. I've been renaming manually some files, specially drill files from KiCad. Everything works, except both silkscreen files. This is a bug, and a very annoying one, since there is no open source tool for Gerber editing so I could manually place the silkscreen on the combined board.
can you attach a picture of the starting pcbs and the merged output? i have been using it with overflowing silkscreen and it worked just fine.
Have you tried disabling the "Clip to board outlines" option in the panel properties?
On Mon, 8 Mar 2021 at 02:33, VinnyCordeiro @.***> wrote:
I'm having the same issue, using both Eagle 7.6 and KiCad 5.1.9: I'm trying to merge 3 boards (one of them with 2 instances), only one of the boards gets the silkscreen properly. All of the PCBs are 4 layers. I'm attaching the files for inspection, all of them are from Open Source projects. combined.zip https://github.com/ThisIsNotRocketScience/GerberTools/files/6098389/combined.zip Arduino_Micro.zip https://github.com/ThisIsNotRocketScience/GerberTools/files/6098391/Arduino_Micro.zip StepStick_Elecrow.zip https://github.com/ThisIsNotRocketScience/GerberTools/files/6098393/StepStick_Elecrow.zip V0_Display.zip https://github.com/ThisIsNotRocketScience/GerberTools/files/6098397/V0_Display.zip
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I have run into my entire bottom silkscreen disappearing with "Clip to board outlines" turned on, and when I tried turning off "Clip to board outlines" I get the following result on the bottom (top is great... never had a problem with the top, always bottom). I believe the silkscreen is offset by the width of "runners" which is 15mm. Project files attached. Using current Eagle for board design. Oh, and to add insult to injury, the bottom does not have any detail (that I know of) that's outside the boundaries of the card. The top has plenty, but that doesn't seem to prevent the top from working perfectly.
However, that image isn't actually representative of the gerber output...
I've discovered that if there is any silkscreen on a layer outside the board outline, the whole silkscreen will be dropped. So I'm usually very careful during board design to make sure I'm not missing any small edges or whatnot.
@ckemere that's disable-able when you disable the "Clip to board outlines" option in panel settings.
I try to use the panelizer tool to merge togheter different boards but the output does not have some silkscreen. I used EAGLE to draw
Step to reproduce: Exported to Gerber using the example CAM you give in another issue The Gerber Viewer tool of the suit show al PCBs silkscreen correctly (before merging) Add to Panelizer Tool succesfully Aftert merge some silkscreen is missing