Closed ZwergNaseXXL closed 3 years ago
Hi - thanks for the report. First of all, to clarify the hardware doesn't do any DC removal, and you can always get that mode from the context menu.
When applied, the DC blocker is just a naive adjustment based on the number of active steps, rather than an explicit DC filter. If you use sync to override (as you're doing) then it probably wont be correct. However without sync it should be accurate, but let me know if it's not. See below for Bogaudio comparison (at 25% pw which is the same as one step one + one step off). I guess if you want real DC, I'd turn it off on the module and add a dedicated blocker afterwards.
On my hardware Sampling Modulator, if:
OK, I guess I'm at fault here, because my software engineering mind saw those inconsistencies and labeled them as bugs. But since people tend to cram as much value-for-money into the hardware modules, one might as well call them features.
Including your comparison with Bogaudio, this gives us three ways of creating the same dependent frequency:
I'm fine with that now, but there might still be one issue: DC correction (which is on by default!) is wrong for (1), correct for (2) and has no effect for (3). Seems to be the same behavior for other pulse widths, too. Not sure if it's worth fixing that.
And regarding my comment about voltages not being exact 0/5/10V: I wasn't aware that this module produces "analogue" waves with some overshoot, so that is explained as well.
Thank you for investigating and sorry for being a nuisance! ;)
All good, and interesting points. Maybe DC blocker is a misnomer, it's just an arithmetic correction for the simple case when its internal VCO / no sync, not a filter. Actually because this module runs smoothly from clock signals (say 1Hz) to audio rate, an actual DC blocker filter at say 10 Hz would just make it unusable at lower frequencies. It's a bit of a compromise.
And regarding my comment about voltages not being exact 0/5/10V: I wasn't aware that this module produces "analogue" waves with some overshoot, so that is explained as well.
If you're interested, this is not so much an analogue re-creation and more the minBlep technique to avoid aliasing. See: https://www.cs.cmu.edu/~eli/papers/icmc01-hardsync.pdf
(also to clarify - I think in terms in DC blocker, I don't think it makes sense to add a filter based one, and you can't arithmetically know the DC correction for an arbitrary sync signal in)
I noticed two issues with Sampling Modulator:
The DC offset correction doesn't look right. The output levels seem to depend on several factors and are never exactly 0V..10V or -5V..5V. Perhaps that's the hardware simulation? But the real issue is that even for a 50/50 pulse signal it's obviously not correct (-2.5V..7.5V), see picture below.
The trigg out produces gates when the internal clock is used and triggers when the external clock is used. I think it should be gates in both cases. Setup is the same as in the picture, just flip the int/ext switch on the right module, which is synced to the left one.