Closed lincolntuist closed 1 year ago
The parser does not recognize the use of the attribute 'subtype. Ex:
signal in_port : std_logic_vector(63 downto 0); signal out_port : in_port'subtype;
This is used to define a signal as the same type of another signal.
Fixed now, this should have been reporter to https://github.com/VHDL-LS repo
The parser does not recognize the use of the attribute 'subtype. Ex:
signal in_port : std_logic_vector(63 downto 0); signal out_port : in_port'subtype;
This is used to define a signal as the same type of another signal.