Double for loop throws recursion error

Describe the bug Double for loop throws recursion error.
To Reproduce
from python2verilog import verilogify, namespace_to_verilog, get_namespace
from python2verilog.utils import make_visual

ns = get_namespace("./notebook")

@verilogify(namespace=ns)
def colored_circle(centre_x, centre_y, radius, color):
    offset_y = 0
    offset_x = radius
    crit = 1 - radius
    while offset_y <= offset_x:
        yield (centre_x + offset_x, centre_y + offset_y, color)  # -- octant 1
        yield (centre_x + offset_y, centre_y + offset_x, color)  # -- octant 2
        yield (centre_x - offset_x, centre_y + offset_y, color)  # -- octant 4
        yield (centre_x - offset_y, centre_y + offset_x, color)  # -- octant 3
        yield (centre_x - offset_x, centre_y - offset_y, color)  # -- octant 5
        yield (centre_x - offset_y, centre_y - offset_x, color)  # -- octant 6
        yield (centre_x + offset_x, centre_y - offset_y, color)  # -- octant 8
        yield (centre_x + offset_y, centre_y - offset_x, color)  # -- octant 7
        offset_y = offset_y + 1
        if crit <= 0:
            crit = crit + 2 * offset_y + 1
        else:
            offset_x = offset_x - 1
            crit = crit + 2 * (offset_y - offset_x) + 1

@verilogify(namespace=ns)
def get_circle_centers_and_colors(mid_x, mid_y, spread):
    yield mid_x, mid_y + spread, 50  # middle top
    yield mid_x + spread * 2, mid_y + spread, 180  # top left
    yield mid_x - spread * 2, mid_y + spread, 500  # top right
    yield mid_x + spread, mid_y - spread, 400  # bottom left
    yield mid_x - spread, mid_y - spread, 300  # bottom right

@verilogify(namespace=ns, optimization_level=1)
def olympic_logo(mid_x, mid_y, radius):
    spread = radius - 2
    ring_center_and_color = get_circle_centers_and_colors(mid_x, mid_y, spread)
    for ring_mid_x, ring_mid_y, color in ring_center_and_color:
        circle = colored_circle(ring_mid_x, ring_mid_y, radius, color)
        for x, y, color in circle:
            yield x, y, color

result = list(olympic_logo(25, 25, 7))
make_visual(result)

module, testbench = namespace_to_verilog(ns)
Expected behavior To work.
WorldofKerry / Python2Verilog

Double for loop throws recursion error #148
