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YosysHQ / nextpnr

nextpnr portable FPGA place and route tool
ISC License
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nextpnr -- a portable FPGA place and route tool

nextpnr aims to be a vendor neutral, timing driven, FOSS FPGA place and route tool.

Currently nextpnr supports:

There is some work in progress towards support for Xilinx devices but it is not upstream and not intended for end users at the present time. We hope to see more FPGA families supported in the future. We would love your help in developing this awesome new project!

A brief (academic) paper describing the Yosys+nextpnr flow can be found on arXiv.

Here is a screenshot of nextpnr for iCE40. Build instructions and getting started notes can be found below.

See also:

Prerequisites

The following packages need to be installed for building nextpnr, independent of the selected architecture:

Getting started

nextpnr-ice40

For iCE40 support, install Project IceStorm to /usr/local or another location, which should be passed as -DICESTORM_INSTALL_PREFIX=/usr to CMake. Then build and install nextpnr-ice40 using the following commands:

cmake . -DARCH=ice40
make -j$(nproc)
sudo make install

On Windows, you may specify paths explicitly:

cmake . -DARCH=ice40 -DICESTORM_INSTALL_PREFIX=C:/ProgramData/icestorm -DCMAKE_TOOLCHAIN_FILE=C:/vcpkg/scripts/buildsystems/vcpkg.cmake -DVCPKG_TARGET_TRIPLET=x64-windows -G "Visual Studio 15 2017 Win64" -DPython3_EXECUTABLE=C:/Python364/python.exe -DPython3_LIBRARY=C:/vcpkg/packages/python3_x64-windows/lib/python36.lib -DPython3_INCLUDE_DIR=C:/vcpkg/packages/python3_x64-windows/include/python3.6 .
cmake --build . --config Release

To build a static release, change the target triplet from x64-windows to x64-windows-static and add -DBUILD_STATIC=ON.

A simple example that runs on the iCEstick dev board can be found in ice40/examples/blinky/blinky.*. Usage example:

cd ice40/examples/blinky
yosys -p 'synth_ice40 -top blinky -json blinky.json' blinky.v               # synthesize into blinky.json
nextpnr-ice40 --hx1k --json blinky.json --pcf blinky.pcf --asc blinky.asc   # run place and route
icepack blinky.asc blinky.bin                                               # generate binary bitstream file
iceprog blinky.bin                                                          # upload design to iCEstick

Running nextpnr in GUI mode (see below for instructions on building nextpnr with GUI support):

nextpnr-ice40 --json blinky.json --pcf blinky.pcf --asc blinky.asc --gui

(Use the toolbar buttons or the Python command console to perform actions such as pack, place, route, and write output files.)

nextpnr-ecp5

For ECP5 support, install Project Trellis to /usr/local or another location, which should be passed as -DTRELLIS_INSTALL_PREFIX=/usr/local to CMake. Then build and install nextpnr-ecp5 using the following commands:

cmake . -DARCH=ecp5 -DTRELLIS_INSTALL_PREFIX=/usr/local
make -j$(nproc)
sudo make install

nextpnr-nexus

For Nexus support, install Project Oxide to $HOME/.cargo or another location, which should be passed as -DOXIDE_INSTALL_PREFIX=$HOME/.cargo to CMake. Then build and install nextpnr-nexus using the following commands:

cmake . -DARCH=nexus -DOXIDE_INSTALL_PREFIX=$HOME/.cargo
make -j$(nproc)
sudo make install

Nexus support is currently experimental, and has only been tested with engineering sample silicon.

nextpnr-generic

The generic target allows running placement and routing for arbitrary custom architectures.

cmake . -DARCH=generic
make -j$(nproc)
sudo make install

An example of how to use the generic flow is in generic/examples. See also the Generic Architecture docs.

nextpnr-himbaechel

The himbaechel target allows running placement and routing for larger architectures that share a common structure.

gowin

For Gowin support, install Project Apicula

cmake . -DARCH="himbaechel" -DHIMBAECHEL_GOWIN_DEVICES="all"
make -j$(nproc)
sudo make install

GUI

The nextpnr GUI is not built by default, to reduce the number of dependencies for a standard headless build. To enable it, add -DBUILD_GUI=ON to the CMake command line and ensure that Qt5 and OpenGL are available:

Multiple architectures

To build nextpnr for multiple architectures at once, a semicolon-separated list can be used with -DARCH.

cmake . -DARCH="ice40;ecp5"
make -j$(nproc)
sudo make install

To build every available stable architecture, use -DARCH=all. To include experimental arches (currently nexus), use -DARCH=all+alpha.

Pre-generating chip databases

It is possible to pre-generate chip databases (.bba files). This can come in handy when building on time-constrained cloud instances, or in situations where Python is unable to use modules. To do this, build the architecture as a standalone project, which will produce the chip database alone. For example, for iCE40:

cd ice40
cmake .
make

This will create a chipdb directory with .bba files. Provide the path to this directory when building nextpnr by using -D<arch>_CHIPDB=/path/to/chipdb.

Cross-compilation

Apart from chip databases, nextpnr requires the bba tool to be compiled for the build system. This tool can be compiled as a separate project:

cd bba
cmake .
make

This will create a bba-export.cmake file. Provide the path to this file when cross-building nextpnr by using -DBBA_IMPORT=/path/to/bba-export.cmake.

Additional notes for building nextpnr

The following runs a debug build of the iCE40 architecture without GUI, without Python support, without the HeAP analytic placer and only HX1K support:

cmake . -DARCH=ice40 -DCMAKE_BUILD_TYPE=Debug -DBUILD_PYTHON=OFF -DICE40_HX1K_ONLY=1
make -j$(nproc)

To make static build release for iCE40 architecture use the following:

cmake . -DARCH=ice40 -DBUILD_PYTHON=OFF -DSTATIC_BUILD=ON
make -j$(nproc)

The HeAP placer's solver can optionally use OpenMP for a speedup on very large designs. Enable this by passing -DUSE_OPENMP=yes to cmake (compiler support may vary).

You can change the location where nextpnr will be installed (this will usually default to /usr/local) by using -DCMAKE_INSTALL_PREFIX=/install/prefix.

Notes for developers

Recording a movie

Testing

Links and references

Synthesis, simulation, and logic optimization

FPGA bitstream documentation (and tools) projects

Other FOSS FPGA place and route projects