KU EECS 581 / 582 senior design project. This is project an attempt to study / explore CPU implementations, with an original goal of implementing the RISCV "V" extension. Code currently incomplete.
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Write a small test program and compile to assembly #80
We need a small test program to use to verify the behavior of the basic RV32IM work-in-progress core once it is complete enough to be run in simulation (or on a borrowed zedboard).
Please write a basic C++ file that adds a few numbers and writes them to stdout. E.g., a for-loop that std::couts numbers 1, 5, 10, 11, 12, 13 -- using add, multiply, subtract, divide operations.
This can be added in a new subfolder, for code we use to verify functionality, or to the usrpgm folder, and should be committed on a new branch.
Compile to RISC-V assembly using the following flags with gcc/g++:
-march=rv32im -S
We need a small test program to use to verify the behavior of the basic RV32IM work-in-progress core once it is complete enough to be run in simulation (or on a borrowed zedboard).
Please write a basic C++ file that adds a few numbers and writes them to stdout. E.g., a for-loop that
std::couts numbers 1, 5, 10, 11, 12, 13 -- using add, multiply, subtract, divide operations.This can be added in a new subfolder, for code we use to verify functionality, or to the usrpgm folder, and should be committed on a new branch.
Compile to RISC-V assembly using the following flags with gcc/g++:
-march=rv32im -S