Development for the AD35xxR

[caosjr]

PR Description

Developed a single IP for the AD3552R, AD3551R, AD3542R, and AD3541R parts. This new IP has support for Single SPI (Classic), Dual SPI, and Quad SPI. It supports changing the SPI mode during execution by setting the multi_io_mode field.

It was tested the interface file with some modifications on the tb.

Created a documentation for this new IP, and the regmap modification on the axi_ad35xxr.

PR Type

• [ ] Bug fix (change that fixes an issue)
• [x] New feature (change that adds new functionality)
• [ ] Breaking change (has dependencies in other repos or will cause CI to fail)

PR Checklist

• [x] I have followed the code style guidelines
• [x] I have performed a self-review of changes
• [x] I have compiled all hdl projects and libraries affected by this PR
• [ ] I have tested in hardware affected projects, at least on relevant boards
• [x] I have commented my code, at least hard-to-understand parts
• [x] I have signed off all commits from this PR
• [x] I have updated the documentation (wiki pages, ReadMe files, Copyright etc)
• [x] I have not introduced new Warnings/Critical Warnings on compilation
• [x] I have added new hdl testbenches or updated existing ones

[sarpadi]

The axi_ad35xx AXI Stream input interface is not defined