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Capstone disassembly/disassembler framework for ARM, ARM64 (ARMv8), Alpha, BPF, Ethereum VM, HPPA, LoongArch, M68K, M680X, Mips, MOS65XX, PPC, RISC-V(rv32G/rv64G), SH, Sparc, SystemZ, TMS320C64X, TriCore, Webassembly, XCore and X86.
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TMS320C64x detail disassembly seems to fail #1366

Closed knightsc closed 5 years ago

knightsc commented 5 years ago

Running capstone 4.0.1

If I run test_basic I get the following output for the TMS320C64x disassembler

****************
Platform: TMS320C64x
Code: 0x01 0xac 0x88 0x40 0x81 0xac 0x88 0x43 0x00 0x00 0x00 0x00 0x02 0x90 0x32 0x96 0x02 0x80 0x46 0x9e 0x05 0x3c 0x83 0xe6 0x0b 0x0c 0x8b 0x24 
Disasm:
0x1000: add     a11, a4, a3
0x1004: add     b11, b4, b3
0x1008: NOP     
0x100c: ldbu        *++a4[1], b5
0x1010: ldbu        *+b15[0x46], b5
0x1014: lddw        *+a15[4], b11:b10
0x1018: ldndw       *+a3(a4), a23:a22
0x101c:

test_basic does not set CS_OPT_DETAIL to CS_OPT_ON

In the test test_tms320c64x however CS_OPT_DETAIL is set to CS_OPT_ON and the output looks like this:

****************
Platform: TMS320C64x
Code:0x01 0xac 0x88 0x40 0x81 0xac 0x88 0x43 0x00 0x00 0x00 0x00 0x02 0x90 0x32 0x96 0x02 0x80 0x46 0x9e 0x05 0x3c 0x83 0xe6 0x0b 0x0c 0x8b 0x24 
Disasm:
0x1000:       add.D1    a11, a4, a3
    op_count: 3
        operands[0].type: REG = a11
        operands[1].type: REG = a4
        operands[2].type: REG = a3
    Functional unit: D1
    Parallel: false

0x1004: [ a1] add.D2    b11, b4, b3 ||
    op_count: 3
        operands[0].type: REG = b11
        operands[1].type: REG = b4
        operands[2].type: REG = b3
    Functional unit: D2
    Condition: [ a1]
    Parallel: true

0x1008:       NOP   
    Functional unit: No Functional Unit
    Parallel: false

0x100c: Invalid!    
    op_count: 2
        operands[0].type: MEM
            operands[0].mem.base: REG = a4
            operands[0].mem.disptype: Constant
            operands[0].mem.disp: 1
            operands[0].mem.unit: 2
            operands[0].mem.direction: Forward
            operands[0].mem.modify: Pre
            operands[0].mem.scaled: 1
        operands[1].type: REG = b5
    Functional unit: D2
    Parallel: false

0x1010: Invalid!    
    op_count: 2
        operands[0].type: MEM
            operands[0].mem.base: REG = b15
            operands[0].mem.disptype: Constant
            operands[0].mem.disp: 70
            operands[0].mem.unit: 2
            operands[0].mem.direction: Forward
            operands[0].mem.modify: No
            operands[0].mem.scaled: 0
        operands[1].type: REG = b5
    Functional unit: D2
    Parallel: false

0x1014: Invalid!    
    op_count: 2
        operands[0].type: MEM
            operands[0].mem.base: REG = a15
            operands[0].mem.disptype: Constant
            operands[0].mem.disp: 4
            operands[0].mem.unit: 2
            operands[0].mem.direction: Forward
            operands[0].mem.modify: No
            operands[0].mem.scaled: 1
        operands[1].type: REGPAIR = b11:b10
    Functional unit: D2
    Parallel: false

0x1018: Invalid!    
    op_count: 2
        operands[0].type: MEM
            operands[0].mem.base: REG = a3
            operands[0].mem.disptype: Register
            operands[0].mem.disp: a4
            operands[0].mem.unit: 1
            operands[0].mem.direction: Forward
            operands[0].mem.modify: No
            operands[0].mem.scaled: 0
        operands[1].type: REGPAIR = a23:a22
    Functional unit: D1
    Parallel: false

0x101c:

Is this expected behavior? I would have thought the mnemonic and operands would be the same with CS_OPT_DETAIL on or off.

david942j commented 5 years ago

I have sent a PR for this issue.

aquynh commented 5 years ago

this should be fixed with https://github.com/aquynh/capstone/pull/1367, thanks.