Timer and gpio interrupt (Embassy async/await/Future)
Addition, the interrupt entry of the .trap section must be aligned with 1KB, otherwise the interrupt cannot run properly.
QingKeV2 Microprocessor Manual
2.2 Entering exception (page5)
...
It should be noted that the vector table base address needs to be 1KB aligned in the
QingKe V2 microprocessor.
The driver was tested on the ZK-J5X hack project, including:
Addition, the interrupt entry of the .trap section must be aligned with 1KB, otherwise the interrupt cannot run properly.
QingKeV2 Microprocessor Manual 2.2 Entering exception (page5) ... It should be noted that the vector table base address needs to be 1KB aligned in the QingKe V2 microprocessor.