Closed mandrys closed 1 year ago
Test for the PR https://github.com/chipsalliance/yosys-f4pga-plugins/pull/506.
Test run without the changes in the plugin: https://github.com/antmicro/yosys-systemverilog/actions/runs/4917083084 After: https://github.com/antmicro/yosys-systemverilog/actions/runs/4917084037/jobs/8781836204
Test for the PR https://github.com/chipsalliance/yosys-f4pga-plugins/pull/506.
Test run without the changes in the plugin: https://github.com/antmicro/yosys-systemverilog/actions/runs/4917083084 After: https://github.com/antmicro/yosys-systemverilog/actions/runs/4917084037/jobs/8781836204