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chipsalliance
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playground
chipyard in mill :P
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Get error when generate verilog.
#66
DavidZyy
opened
4 months ago
2
which version of mill should i use?
#65
DavidZyy
closed
4 months ago
3
make bsp error due to dependency resolution failure
#64
Frwere
opened
6 months ago
1
fix readme, should use `nix develop` for nix flake
#63
yuchangyuan
opened
7 months ago
1
bump chisel3p6 with new rocket-chip and nixpkgs
#62
cyyself
closed
1 year ago
0
Correct a typo in readme.md
#61
felixonmars
opened
1 year ago
0
build error
#60
skinterqwe
opened
1 year ago
0
run error
#59
skinterqwe
closed
1 year ago
0
How to add options to the shell when I try to compile lofirrtl using treadle?
#58
wky17
closed
1 year ago
0
Run playground with Chisel5
#57
sequencer
closed
1 year ago
0
CI on pull request
#56
ZenithalHourlyRate
closed
1 year ago
0
fix wrong package name
#55
Lucas-Wye
closed
6 months ago
0
Fix myrocket build
#54
ZenithalHourlyRate
closed
1 year ago
0
firrtl: fix NoSuchElementException: empty.head
#53
vowstar
closed
1 year ago
2
firrtlCrossModule.antlr4Path java.util.NoSuchElementException: empty.head
#52
vowstar
opened
1 year ago
0
Remove deprecated DSP
#51
sequencer
closed
1 year ago
0
use "git" protocol for submodule prevent access without a github account
#50
yuchangyuan
opened
1 year ago
0
Rename memif_endianness_t to endianness_t
#49
OceanS2000
closed
1 year ago
0
fix: chisel3 pr #2758
#48
SingularityKChen
closed
1 year ago
0
make compile fail for commit 5994344ba065f160011531ad7dda6b85615fee66
#47
yuchangyuan
opened
1 year ago
1
Introduce rocket chip CI in scala
#46
ZenithalHourlyRate
closed
1 year ago
1
sanitytests: remove hello
#45
ZenithalHourlyRate
closed
1 year ago
0
how to generate the gragh.ml file
#44
skinterqwe
closed
1 year ago
0
fix: S-interpolator for assert, assume and printf
#43
SingularityKChen
closed
1 year ago
0
fix: S-interpolator for assert, assume and printf
#42
SingularityKChen
closed
1 year ago
0
fix: S-interpolator for assert, assume and printf
#41
SingularityKChen
closed
1 year ago
0
fix: S-interpolator for assert, assume and printf
#40
SingularityKChen
closed
1 year ago
0
mill bsp error
#39
skinterqwe
closed
1 year ago
2
Testing environment for AXKU040 dev board
#38
OceanS2000
opened
1 year ago
3
Port rocket-chip regression tests
#37
geekLucian
closed
1 year ago
1
fix: Recover unmerged patch https://github.com/chipsalliance/rocket-chip/pull/3013
#36
geekLucian
closed
1 year ago
0
modify sanitytests/fpga, can sythesize successfully in vivado
#35
JACKLIAO0
closed
1 year ago
4
fix: Override dtm's default endianness to le
#34
geekLucian
closed
1 year ago
0
Cleanup for the org transfer
#33
felixonmars
closed
1 year ago
0
[rocket-chip] Not working when DefaultRV32Config
#32
ZenithalHourlyRate
closed
1 year ago
1
Add Chisel3 patch: copy constructors for ExplicitCompileOptions
#31
sinofp
closed
1 year ago
2
shell.nix: specify sha256 of nixpkgs tarball.
#30
yuchangyuan
closed
2 years ago
2
hello: strip
#29
ZenithalHourlyRate
closed
2 years ago
6
nix: lock to commit b3adce15
#28
ZenithalHourlyRate
closed
2 years ago
1
introduce XiangShan to playground, have fun.
#27
sequencer
closed
1 year ago
1
feat: Multithreading verilator test with numactl
#26
geekLucian
closed
2 years ago
1
add patch to riscv-boom
#25
ZenithalHourlyRate
closed
2 years ago
0
nix: lock to commit 41b500b737
#24
ZenithalHourlyRate
closed
2 years ago
0
Cannot make bsp
#23
yangkex
closed
2 years ago
2
Updated link to Mill documentation
#22
lefou
closed
2 years ago
1
bump: decrease freq to once a day
#21
ZenithalHourlyRate
closed
2 years ago
0
emulator: enable vcd output
#20
ZenithalHourlyRate
closed
1 year ago
1
Fix compile in Darwin
#19
sequencer
closed
2 years ago
0
Update readme.md
#18
ZenithalHourlyRate
closed
2 years ago
0
Emulator
#17
ZenithalHourlyRate
closed
2 years ago
0
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