chipsalliance / python-fpga-interchange

Python interface to FPGA interchange format
ISC License
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yosys_json: Convert macros to blackboxes #67

Closed gatecat closed 3 years ago

gatecat commented 3 years ago

We don't want to include the macro content in the logical netlist; as at this point macros are blackboxes just like primitives.

The macro expansion is based on data in the chipdb; not the netlist.

gatecat commented 3 years ago

This should be safe to merge ahead of the other macro stuff (which might still be a few days away so might as well have as little as possible outstanding).

gatecat commented 3 years ago

Friendly bump

gatecat commented 3 years ago

Merged via #68