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chipsalliance / python-fpga-interchange

Python interface to FPGA interchange format
ISC License
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Why get_primitive_library is using self.strs #95

Closed mtdudek closed 3 years ago

mtdudek commented 3 years ago

@gatecat I'm having issue with get_primitive_library, when it calls to_logical_netlist it passes self.strs, this causes cellDecls names to no longer reference strings inside primLibs.strList but strings inside self.strs. This is unclear to me, why we are doing it this way. I assume this was done due to some devices not having strList set and their names were referring to global names.

gatecat commented 3 years ago

Have you seen the discussion behind this in #47 ?

mtdudek commented 3 years ago

May bad, did not see this issue.