nexus: Basic FASM generator support for BRAM

chipsalliance / python-fpga-interchange

Python interface to FPGA interchange format

ISC License

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nexus: Basic FASM generator support for BRAM #97

Closed gatecat closed 3 years ago

gatecat commented 3 years ago

Please note that this currently sits on top of #92 and #96.

With latest prjoxide master and YosysHQ/nextpnr#728, it is possible to build and run a simple BRAM test on hardware (LIFCL-40-EVN) successfully.

gatecat commented 3 years ago

I can also confirm with the same environment as above that a Murax proof-of-concept test is happily blinking LEDs on LIFCL hardware! (I can't fully test the UART side due to baudrate issues with the current clocking arrangements, but I think it's OK too.)

I'll work on a proper Murax test for fpga-interchange-tests once these various patches are upstreamed.

gatecat commented 3 years ago

Yes, please feel free to merge & tag this and then I'll update the nextpnr PR.