[pmp] pmpaddr value is not correct when XLEN=64

[atsushi-shinbo-esoltrinity]

When XLEN=64, pmpaddr value is invalid in the generated code.

I wrote definitions of pmp regions in testlist.yaml as following.

  +pmp_region_0=L:0,A:NAPOT,X:1,W:1,R:1,ADDR:8000000C
  +pmp_region_1=L:0,A:OFF,X:1,W:0,R:1,ADDR:00000000
  +pmp_region_2=L:0,A:TOR,X:1,W:0,R:1,ADDR:FFFFFFFF

The expected value of pmpaddr registers are;

• pmpaddr0 = 0x20000003 (NAPOT: 32-byte range from 0x80000000)
• pmpaddr1 = 0x00000000
• pmpaddr2 = 0x3FFFFFFF (TOR: from 0x00000000 to 0xFFFFFFFF)

However, actual generated code will set the registers as following;

• pmpaddr0 = 0x3fffffe0000003 (invalid)
• pmpaddr1 = 0x00000000
• pmpaddr2 = 0x3fffffffffffff (invalid)

These are not correct. It seems that riscv-dv interpret the ADDR definition in testlist.yaml as a signed 32-bit integer value. And sign extends it to a 64-bit value (8000000C -> FFFFFFFF8000000C). Then, shift right by 2-bit and trim to 54-bit (FFFFFFFF8000000C -> 3fffffe0000003).

The expected behavior is to handle the definition as unsigned value.

How to reproduce

• Modify target/rv64gc/riscv_core_setting.sv as following,

  
  // Physical memory protection support

• bit support_pmp = 0;

• bit support_pmp = 1;

• Modify target/rv32imc/testlist.yaml as following,

  
  - test: riscv_pmp_test
  gen_opts: >
    +pmp_randomize=0

• +pmp_num_regions=1

• +pmp_num_regions=3 +pmp_granularity=1

• +pmp_region_0=L:0,A:TOR,X:1,W:1,R:1,ADDR:FFFFFFFF

• +pmp_region_0=L:0,A:NAPOT,X:1,W:1,R:1,ADDR:8000000C

• +pmp_region_1=L:0,A:OFF,X:1,W:0,R:1,ADDR:00000000

• +pmp_region_2=L:0,A:TOR,X:1,W:0,R:1,ADDR:FFFFFFFF rtl_test: core_base_test

• Run following command,

  python3 run.py --iterations 1 --seed 1 --target=rv64gc --isa=rv64gc --mabi=lp64 --test=riscv_pmp_test --simulator xlm --output out

• result

out/sim_riscv_pmp_test_0.log

UVM_INFO riscv-dv/src/riscv_pmp_cfg.sv(146) @ 0: reporter [pmp_cfg] pmp max offset: 0xffffffffffffffff
UVM_INFO riscv-dv/src/riscv_pmp_cfg.sv(170) @ 0: reporter [pmp_cfg] MAX OFFSET: 0xffffffffffffffff
UVM_INFO riscv-dv/src/riscv_pmp_cfg.sv(209) @ 0: reporter [pmp_cfg] Configured pmp_cfg[0] from command line: '{l:'h0, zero:'h0, a:NAPOT, x:'h1, w:'h1, r:'h1, addr:'h3fffffe0000003, offset:'h0}
UVM_INFO riscv-dv/src/riscv_pmp_cfg.sv(209) @ 0: reporter [pmp_cfg] Configured pmp_cfg[1] from command line: '{l:'h0, zero:'h0, a:OFF, x:'h1, w:'h0, r:'h1, addr:'h0, offset:'h7fffffffffffffff}
UVM_INFO riscv-dv/src/riscv_pmp_cfg.sv(209) @ 0: reporter [pmp_cfg] Configured pmp_cfg[2] from command line: '{l:'h0, zero:'h0, a:TOR, x:'h1, w:'h0, r:'h1, addr:'h3fffffffffffff, offset:'hfffffffffffffffe}

out/asm_test/riscv_pmp_test_0.S

pmp_setup:
                  li x25, 0x3fffffe0000003
                  csrw 0x3b0, x25
                  li x25, 0x0
                  csrw 0x3b1, x25
                  li x25, 0x3fffffffffffff
                  csrw 0x3b2, x25
                  li x25, 0xd051f
                  csrw 0x3a0, x25

Versions

• riscv-dv : 68e3bcac7293ac79067f0d8196bb973bd7c889cf
• Cadence Xcelium : 22.03