This is the first half of the TDX enabling work in stage2. It focuses on boot_stage2.rs, before reaching stage2_main(). The main goal of this patchset is to lay the groundwork for TD SMP support. TD SMP boot flow is different from traditional x86 SMP in that all TD vCPUs start execution in 32-bit non-paged mode concurrently and the INIT/SIPI protocol is not used.
This is the first half of the TDX enabling work in stage2. It focuses on boot_stage2.rs, before reaching stage2_main(). The main goal of this patchset is to lay the groundwork for TD SMP support. TD SMP boot flow is different from traditional x86 SMP in that all TD vCPUs start execution in 32-bit non-paged mode concurrently and the INIT/SIPI protocol is not used.