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crossbeam-rs / crossbeam

Tools for concurrent programming in Rust
Apache License 2.0
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CachePadded aligns aarch64 to 64 instead of 128 #1139

Closed xpepermint closed 2 months ago

xpepermint commented 2 months ago

Ref: https://github.com/crossbeam-rs/crossbeam/issues/1138

taiki-e commented 2 months ago

If we revert align of AArch64, we need to address the following comment explaining why we are currently using 128 in AArch64.

https://github.com/crossbeam-rs/crossbeam/blob/abf24e1f31a76ef2590688d0c2bb55f82c7410a9/crossbeam-utils/src/cache_padded.rs#L70-L73

taiki-e commented 2 months ago

Considering that the cache line size of the Apple M1 actually seems to be 128 bytes, your guess at https://github.com/crossbeam-rs/crossbeam/issues/1138 regarding the problem you encountered is probably wrong and doing this does not seem right.

$ sysctl machdep.cpu.brand_string
machdep.cpu.brand_string: Apple M1 (Virtual)

$ sysctl hw.cachelinesize
hw.cachelinesize: 128
$ sysctl machdep.cpu.brand_string
machdep.cpu.brand_string: Apple M1 Pro

$ sysctl hw.cachelinesize
hw.cachelinesize: 128