Incorrect power pins - Githubissues

efabless / caravel_mgmt_soc_gf180mcu

This repository is the GF180MCU port of management core for Caravel. For more information about the Caravel management SoC, see https://github.com/efabless/caravel_mgmt_soc_litex.

Apache License 2.0

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Incorrect power pins #7

Closed mo-hosni closed 2 years ago

mo-hosni commented 2 years ago

ISSUE: The current power pins for:

VexRiscv_MinDebugCache are vccd1 and vssd1
mgmt_core are VPWR and VGND

FIX: All power pins should be VDD and VSS and the comment should be /* 5.0V domain */ instead of /* 1.8V domain */