display SDRAM initialize error messages with RTL8710.

[eggman]

This sample always initialize SDRAM.

RTL8710AF and RTL8711AF don't have SDRAM.

When execute this sample on RTL8710AF, display SDRAM initialize error messages.

But SDRAM initialize code is in binary blob ( sdk/lib/startup.o )

[eggman]

SDRAM initialize error messages

=========================================================

ROM Version: 0.3

Build ToolChain Version: gcc version 4.8.3 (Realtek ASDK-4.8.3p1 Build 2003)

=========================================================
Check boot type form eFuse
SPI Initial
Image1 length: 0x2abc, Image Addr: 0x10000bc8
Image1 Validate OK, Going jump to Image1
SPI calibration
Find the avaiable window
===== Enter Image 1 ====elay start:0; Delay end:6
SPI calibration
Find the avaiable window
Baud:1; auto_length:12; Delay start:0; Delay end:63
SDR Controller Init
IOCR: 0x0; Write: 0x0
DLY: 0x31; Write: 0x0
Test 0: No match addr 0x22674 => 0x4501511c != 0xf
DLY: 0x10031; Write: 0x1
Test 0: No match addr 0x15511c => 0xb != 0xf
DLY: 0x20031; Write: 0x2
Test 0: No match addr 0x1274b4 => 0xe != 0xf
DLY: 0x30031; Write: 0x3
Test 0: No match addr 0x2edb8 => 0x0 != 0xf
DLY: 0x40031; Write: 0x4
Test 0: No match addr 0x84794 => 0x6c3e2df3 != 0xf
DLY: 0x50031; Write: 0x5
Test 0: No match addr 0xefeec => 0x484d616a != 0xf
DLY: 0x60031; Write: 0x6
Test 0: No match addr 0x1d85bc => 0x2 != 0xf
DLY: 0x70031; Write: 0x7
Test 0: No match addr 0x19f9f0 => 0x60ac7866 != 0xf
DLY: 0x80031; Write: 0x8
Test 0: No match addr 0xdb070 => 0x6c06c1bd != 0xf
DLY: 0x90031; Write: 0x9
Test 0: No match addr 0x223fc => 0x29a7c62a != 0xf
DLY: 0xa0031; Write: 0xa
Test 0: No match addr 0x7dc28 => 0x26c95f04 != 0xf
DLY: 0xb0031; Write: 0xb
Test 0: No match addr 0xd308c => 0xa032dd3 != 0xf
DLY: 0xc0031; Write: 0xc
Test 0: No match addr 0xf34dc => 0x0 != 0xf
IOCR: 0x100; Write: 0x100
DLY: 0x31; Write: 0x0
Test 0: No match addr 0x182a44 => 0xc != 0xf
DLY: 0x10031; Write: 0x1
Test 0: No match addr 0x700a0 => 0x2 != 0xf
DLY: 0x20031; Write: 0x2
Test 0: No match addr 0x33084 => 0x12cf0eb2 != 0xf
DLY: 0x30031; Write: 0x3
Test 0: No match addr 0xa0548 => 0x3102c049 != 0xf
DLY: 0x40031; Write: 0x4
Test 0: No match addr 0x1f2594 => 0x3c5e7c1c != 0xf
DLY: 0x50031; Write: 0x5
Test 0: No match addr 0xb28cc => 0x376f72ca != 0xf
DLY: 0x60031; Write: 0x6
Test 0: No match addr 0x13b2f0 => 0x2b8af0ce != 0xf
DLY: 0x70031; Write: 0x7
Test 0: No match addr 0x10ce74 => 0x1b462560 != 0xf
DLY: 0x80031; Write: 0x8
Test 0: No match addr 0x5e278 => 0x3f1dbabc != 0xf
DLY: 0x90031; Write: 0x9
Test 0: No match addr 0x18fa04 => 0xe != 0xf
DLY: 0xa0031; Write: 0xa
Test 0: No match addr 0x125848 => 0x23cf0e05 != 0xf
DLY: 0xb0031; Write: 0xb
Test 0: No match addr 0x10ebb8 => 0xc != 0xf
DLY: 0xc0031; Write: 0xc
Test 0: No match addr 0x1193e0 => 0xff2f8aa != 0xf
IOCR: 0x200; Write: 0x200
DLY: 0x31; Write: 0x0
Test 0: No match addr 0xd106c => 0x5ad1c9e8 != 0xf
DLY: 0x10031; Write: 0x1
Test 0: No match addr 0x3e798 => 0xd != 0xf
DLY: 0x20031; Write: 0x2
Test 0: No match addr 0x108e94 => 0x3e1b284 != 0xf
DLY: 0x30031; Write: 0x3
Test 0: No match addr 0x6c1c => 0x241503aa != 0xf
DLY: 0x40031; Write: 0x4
Test 0: No match addr 0xf5208 => 0x2 != 0xf
DLY: 0x50031; Write: 0x5
Test 0: No match addr 0x143d40 => 0x1cb17f22 != 0xf
DLY: 0x60031; Write: 0x6
Test 0: No match addr 0x213ec => 0x7b374c64 != 0xf
DLY: 0x70031; Write: 0x7
Test 0: No match addr 0x1b4ac0 => 0xa != 0xf
DLY: 0x80031; Write: 0x8
Test 0: No match addr 0x1cddbc => 0xe != 0xf
DLY: 0x90031; Write: 0x9
Test 0: No match addr 0xf9b34 => 0x17866403 != 0xf
DLY: 0xa0031; Write: 0xa
Test 0: No match addr 0x1d67ac => 0x3 != 0xf
DLY: 0xb0031; Write: 0xb
Test 0: No match addr 0xd5390 => 0x5e9463fb != 0xf
DLY: 0xc0031; Write: 0xc
Test 0: No match addr 0x14dcbc => 0x6d545410 != 0xf
IOCR: 0x300; Write: 0x300
DLY: 0x31; Write: 0x0
Test 0: No match addr 0xd0b88 => 0x6 != 0xf
DLY: 0x10031; Write: 0x1
Test 0: No match addr 0x6bcc8 => 0x33a3af7f != 0xf
DLY: 0x20031; Write: 0x2
Test 0: No match addr 0xb2694 => 0x1ed9e5a8 != 0xf
DLY: 0x30031; Write: 0x3
Test 0: No match addr 0x3618 => 0xf != 0xf
DLY: 0x40031; Write: 0x4
Test 0: No match addr 0xdd148 => 0xc != 0xf
DLY: 0x50031; Write: 0x5
Test 0: No match addr 0x1bfeec => 0x9 != 0xf
DLY: 0x60031; Write: 0x6
Test 0: No match addr 0xb4fb4 => 0x244c02c2 != 0xf
DLY: 0x70031; Write: 0x7
Test 0: No match addr 0xc113c => 0x31073c52 != 0xf
DLY: 0x80031; Write: 0x8
Test 0: No match addr 0x1e7d20 => 0x4 != 0xf
DLY: 0x90031; Write: 0x9
Test 0: No match addr 0x1f353c => 0x5c2b912c != 0xf
DLY: 0xa0031; Write: 0xa
Test 0: No match addr 0x1f482c => 0x0 != 0xf
DLY: 0xb0031; Write: 0xb
Test 0: No match addr 0x1858fc => 0x5 != 0xf
DLY: 0xc0031; Write: 0xc
Test 0: No match addr 0x1a3614 => 0x8 != 0xf
IOCR: 0x400; Write: 0x400
DLY: 0x31; Write: 0x0
Test 0: No match addr 0x1a0e64 => 0x6 != 0xf
DLY: 0x10031; Write: 0x1
Test 0: No match addr 0x1d1f2c => 0x77136781 != 0xf
DLY: 0x20031; Write: 0x2
Test 0: No match addr 0x1f1258 => 0xe != 0xf
DLY: 0x30031; Write: 0x3
Test 0: No match addr 0x123b20 => 0x13aff769 != 0xf
DLY: 0x40031; Write: 0x4
Test 0: No match addr 0x1f6fb8 => 0xe != 0xf
DLY: 0x50031; Write: 0x5
Test 0: No match addr 0xa7aac => 0x9f71277 != 0xf
DLY: 0x60031; Write: 0x6
Test 0: No match addr 0xbfd04 => 0x752b29fa != 0xf
DLY: 0x70031; Write: 0x7
Test 0: No match addr 0x31584 => 0x21fed18e != 0xf
DLY: 0x80031; Write: 0x8
Test 0: No match addr 0xcaac0 => 0x6 != 0xf
DLY: 0x90031; Write: 0x9
Test 0: No match addr 0x14d7e0 => 0xb != 0xf
DLY: 0xa0031; Write: 0xa
Test 0: No match addr 0x1e2e74 => 0x128af363 != 0xf
DLY: 0xb0031; Write: 0xb
Test 0: No match addr 0xe9878 => 0xd != 0xf
DLY: 0xc0031; Write: 0xc
Test 0: No match addr 0x1d1d5c => 0xe != 0xf
IOCR: 0x500; Write: 0x500
DLY: 0x31; Write: 0x0
Test 0: No match addr 0x1f7820 => 0x6bc40e63 != 0xf
DLY: 0x10031; Write: 0x1
Test 0: No match addr 0x7b84c => 0x70ae5862 != 0xf
DLY: 0x20031; Write: 0x2
Test 0: No match addr 0x148b08 => 0x37eb53fe != 0xf
DLY: 0x30031; Write: 0x3
Test 0: No match addr 0x14bf00 => 0x2 != 0xf
DLY: 0x40031; Write: 0x4
Test 0: No match addr 0x15facc => 0x3a0280c6 != 0xf
DLY: 0x50031; Write: 0x5
Test 0: No match addr 0x1fce00 => 0x9 != 0xf
DLY: 0x60031; Write: 0x6
Test 0: No match addr 0x113974 => 0xc != 0xf
DLY: 0x70031; Write: 0x7
Test 0: No match addr 0x3860 => 0x1 != 0xf
DLY: 0x80031; Write: 0x8
Test 0: No match addr 0x14b248 => 0xa != 0xf
DLY: 0x90031; Write: 0x9
Test 0: No match addr 0x1ca19c => 0x2 != 0xf
DLY: 0xa0031; Write: 0xa
Test 0: No match addr 0x1d4fc => 0x4f9788e4 != 0xf
DLY: 0xb0031; Write: 0xb
Test 0: No match addr 0x1169c4 => 0x17ef9983 != 0xf
DLY: 0xc0031; Write: 0xc
Test 0: No match addr 0x1772f0 => 0x2929b0b0 != 0xf
IOCR: 0x600; Write: 0x600
DLY: 0x31; Write: 0x0
Test 0: No match addr 0x1b9ea8 => 0x5ea71339 != 0xf
DLY: 0x10031; Write: 0x1
Test 0: No match addr 0x7f04 => 0x458efed3 != 0xf
DLY: 0x20031; Write: 0x2
Test 0: No match addr 0x1683c4 => 0x61bae2d != 0xf
DLY: 0x30031; Write: 0x3
Test 0: No match addr 0xd4408 => 0xc != 0xf
DLY: 0x40031; Write: 0x4
Test 0: No match addr 0x152e60 => 0x4c06cb5c != 0xf
DLY: 0x50031; Write: 0x5
Test 0: No match addr 0x1309d0 => 0x214baa9b != 0xf
DLY: 0x60031; Write: 0x6
Test 0: No match addr 0xdd704 => 0xe != 0xf
DLY: 0x70031; Write: 0x7
Test 0: No match addr 0x97660 => 0xf != 0xf
DLY: 0x80031; Write: 0x8
Test 0: No match addr 0x7efec => 0x0 != 0xf
DLY: 0x90031; Write: 0x9
Test 0: No match addr 0x196a14 => 0x11e73386 != 0xf
DLY: 0xa0031; Write: 0xa
Test 0: No match addr 0x1e2f20 => 0x6f161eac != 0xf
DLY: 0xb0031; Write: 0xb
Test 0: No match addr 0x1c0138 => 0x4 != 0xf
DLY: 0xc0031; Write: 0xc
Test 0: No match addr 0xa74ec => 0x1251c5ae != 0xf
IOCR: 0x700; Write: 0x700
DLY: 0x31; Write: 0x0
Test 0: No match addr 0xa02b8 => 0xf189b15 != 0xf
DLY: 0x10031; Write: 0x1
Test 0: No match addr 0xde7cc => 0xc != 0xf
DLY: 0x20031; Write: 0x2
Test 0: No match addr 0x1e3d20 => 0x3befce0 != 0xf
DLY: 0x30031; Write: 0x3
Test 0: No match addr 0xf9604 => 0x204dbfe3 != 0xf
DLY: 0x40031; Write: 0x4
Test 0: No match addr 0x10e91c => 0x4072aca0 != 0xf
DLY: 0x50031; Write: 0x5
Test 0: No match addr 0x1f6370 => 0xa1d6494 != 0xf
DLY: 0x60031; Write: 0x6
Test 0: No match addr 0x124f98 => 0x66047029 != 0xf
DLY: 0x70031; Write: 0x7
Test 0: No match addr 0x122034 => 0x66a1f90c != 0xf
DLY: 0x80031; Write: 0x8
Test 0: No match addr 0x61588 => 0x6 != 0xf
DLY: 0x90031; Write: 0x9
Test 0: No match addr 0x770d0 => 0x166d0836 != 0xf
DLY: 0xa0031; Write: 0xa
Test 0: No match addr 0x4aae8 => 0x6caabfb3 != 0xf
DLY: 0xb0031; Write: 0xb
Test 0: No match addr 0x1a6d9c => 0x51a91e6d != 0xf
DLY: 0xc0031; Write: 0xc
Test 0: No match addr 0x179f88 => 0xa != 0xf
Image2 @ 0x00002adc
Image2 length: 3292, Image Addr: 0x10003684
No Image3
Img2 Sign: RTKWin, InfaStart @ 0x10003699
===== Enter Image 2 ====

[tidklaas]

Looking at the disassembly for startup.o shows that function SdrControllerInit is called from PreProcessForVendor. The sdk-ameba1-v3.4b3_without_NDA has the source for that in component/soc/realtek/8195a/fwlib/src/hal_sdr_controller.c.

You could either write a dummy replacement for SdrControllerInit and make the linker use that or replace the whole startup.o with your own code. It contains just five functions, none of them very complex: InfraStart StartupHalInitPlatformLogUart SYSCpuClkConfig PreProcessForVendor SYSPlatformInit

[eggman]

I tried to replace only SdrControllerInit() with own code, but It did not go well.

I add my SdrControllerInit() to main.c

u32 SdrControllerInit(VOID)
{
    DBG_8195A("My SDR Controller Init\n");

    return 0;
}

I modify Makefille for link.

ELF_FLAGS+= -Wl,--allow-multiple-definition

result log

=========================================================

ROM Version: 0.3

Build ToolChain Version: gcc version 4.8.3 (Realtek ASDK-4.8.3p1 Build 2003)

=========================================================
Check boot type form eFuse
SPI Initial
Image1 length: 0x1f7c, Image Addr: 0x10000bc8
Image1 Validate OK, Going jump to Image1
SPI calibration
Find the avaiable window
===== Enter Image 1 ====elay start:0; Delay end:6
SPI calibration
Find the avaiable window
Baud:1; auto_length:12; Delay start:0; Delay end:63
RTL8195A[HAL]: Hard Fault Error!!!!
RTL8195A[HAL]: R0 = 0x10000314
RTL8195A[HAL]: R1 = 0x0
RTL8195A[HAL]: R2 = 0x14000000
RTL8195A[HAL]: R3 = 0xf01e
RTL8195A[HAL]: R12 = 0x63
RTL8195A[HAL]: LR = 0x10001ea1
RTL8195A[HAL]: PC = 0x10002b78
RTL8195A[HAL]: PSR = 0x21008e00
RTL8195A[HAL]: BFAR = 0x200000bc
RTL8195A[HAL]: CFSR = 0x8200
RTL8195A[HAL]: HFSR = 0x40000000
RTL8195A[HAL]: DFSR = 0x0
RTL8195A[HAL]: AFSR = 0x0
RTL8195A[HAL]: PriMask 0x0
RTL8195A[HAL]: BasePri 0x0
RTL8195A[HAL]: SVC priority: 0x00
RTL8195A[HAL]: PendSVC priority: 0x00
RTL8195A[HAL]: Systick priority: 0x00

[tidklaas]

Hmm, looks like SdrControllerInit does more than just set up the DRAM. I will try to figure it out when my modules arrive.

[eggman]

I try to patch startup.o. This patch is OK. Error messages are not displayed.

• original startup.o

00002a0 2b 68 98 47 bd e8 f0 81 ff f7 fe ff bc e7 23 68

 1f8:   f7ff fffe       bl      0 <SdrControllerInit>

• patched startup.o

00002a0 2b 68 98 47 bd e8 f0 81 c0 46 c0 46 bc e7 23 68

 1f8:   46c0            nop                     ; (mov r8, r8)
 1fa:   46c0            nop                     ; (mov r8, r8)

• log

=========================================================

ROM Version: 0.3

Build ToolChain Version: gcc version 4.8.3 (Realtek ASDK-4.8.3p1 Build 2003)

=========================================================
Check boot type form eFuse
SPI Initial
Image1 length: 0x2684, Image Addr: 0x10000bc8
Image1 Validate OK, Going jump to Image1
SPI calibration
Find the avaiable window
===== Enter Image 1 ====elay start:0; Delay end:6
SPI calibration
Find the avaiable window
Baud:1; auto_length:12; Delay start:0; Delay end:63
Image2 @ 0x000026a4
Image2 length: 548, Image Addr: 0x1000324c
No Image3
Img2 Sign: RTKWin, InfaStart @ 0x10003261
===== Enter Image 2 ====
Hello World : 0
Hello World : 1

[eggman]

I fixed this issue.

I noticed that startup.o has multiple sections.

$ arm-none-eabi-objdump -D sdk/lib/startup.o

Disassembly of section .infra.ram.start:

00000000 <InfraStart>:
   0:   b508            push    {r3, lr}
...
Disassembly of section .hal.ram.text:

00000000 <StartupHalInitPlatformLogUart>:
   0:   e92d 4ff8       stmdb   sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}

PreProcessForVendor() and SdrControllerInit() execute in Image1 contxet.

I add a section specified in SdrControllerInit().

int32_t SdrControllerInit(void) __attribute__((section(".hal.ram.text")));