enjoy-digital / litex

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undefined reference to `cdelay' in spiflash.c when integrated_main_ram_size is not zero but uses spiflash #1701

Closed duqiang closed 1 year ago

duqiang commented 1 year ago

As of 2023.04 release tag, the cdelay() function call introduced by commit 118dd6e in spiflahs.c breaks the bios building process, when the SoC is not using external dram (i.e. integrated_main_ram_size is non-zero) but uses spiflash. This is because cdelay() is defined in sdram.c.

Typical error message:

 CC       boot.o
 CC       cmd_bios.o
 CC       cmd_mem.o
 CC       cmd_boot.o
 CC       cmd_i2c.o
 CC       cmd_spiflash.o
 CC       cmd_litedram.o
 CC       cmd_liteeth.o
 CC       cmd_litesdcard.o
 CC       cmd_litesata.o
 CC       sim_debug.o
 CC       main.o
 CC       bios.elf
/usr/lib/riscv64-unknown-elf/bin/ld: ../liblitespi/liblitespi.a(spiflash.o): in function `spiflash_erase_range':
/home/tools/litex/litex/litex/soc/software/liblitespi/spiflash.c:193: undefined reference to `cdelay'
collect2: error: ld returned 1 exit status
enjoy-digital commented 1 year ago

Thanks @duqiang for reporting, this is fixed with https://github.com/enjoy-digital/litex/commit/200a1a18ee980aad32c3239acc66af64d10c5a2b (thanks to @AndrewD and @rtucker85).