Closed ikuyas closed 6 months ago
I don't remember the whole details, but looks like I haven't included it to this list because float-point instructions typically shouldn't use ep
and lp
regs.
But there is no any restrictions for it, so will be better to include it there like you did.
I hope it will not lead to some strange behavior, because somtimes Ghidra likes to combine two separate values into one 64-bit.
Ghidra cannot disassemble "ac07 89f3 0000" and "a307 4ff5 0000", which are actual pieces of code. They should be "ld.dw 0x38[r12], r30r31" and "st.dw r30r31, 0x54[sp]". I have made the following changes.
Ghidra/Processors/rh850/data/languages$ diff v850_common.bak v850_common.sinc
14c14
< [ r0r1 r2sp _ r6r7 r8r9 r10r11 r12r13 r14r15 r16r17 r18r19 r20r21 r22r23 r24r25 r26r27 r28r29 _ ];
---
> [ r0r1 r2sp _ r6r7 r8r9 r10r11 r12r13 r14r15 r16r17 r18r19 r20r21 r22r23 r24r25 r26r27 r28r29 r30r31 ];
218c218
< [ r0r1 _ r2sp _ _ _ r6r7 _ r8r9 _ r10r11 _ r12r13 _ r14r15 _ r16r17 _ r18r19 _ r20r21 _ r22r23 _ r24r25 _ r26r27 _ r28r29 _ _ _ ];
---
> [ r0r1 _ r2sp _ _ _ r6r7 _ r8r9 _ r10r11 _ r12r13 _ r14r15 _ r16r17 _ r18r19 _ r20r21 _ r22r23 _ r24r25 _ r26r27 _ r28r29 _ r30r31 _ ];