Closed yuzehang closed 2 days ago
@yuzehang ESP32-C3 runs the USB-JTAG state machine from the (APB clock / 2) which is 40 MHz. OpenOCD calculates the divisor for lower speeds based on this 40 MHz clock. Therefore, if you set the adapter speed to 20000, you will observe a reduced clock. Divisor will be 2. In other words, If you select exact divisors of 40 MHz, you will see the expected result.
Oh, I see. It worked. Thank you very much!
Development Kit
Customer Board
Module or chip used
ESP32-C3-MINI-1
Debug Adapter
ESP32C3 Build-in JTAG
OpenOCD version
Open On-Chip Debugger v0.12.0-esp32-20240318 (2024-03-18-18:26)
Operating System
Windows
Using an IDE ?
VSCode
OpenOCD command line
c:\WinSoftware\esp.espressif\tools\openocd-esp32\v0.12.0-esp32-20240318\openocd-esp32\bin\openocd.exe
JTAG Clock Speed
40000KHz
ESP-IDF version
V5.3.1
Problem Description
I modified the 'adapter speed 40000' field in the '.espressif\tools\openocd-esp32\v0.12.0-esp32-20240318\openocd-esp32\share\openocd\scripts\interface\esp_usb_jtag.cfg' file, changing it to 'adapter speed 24000', in an attempt to lower the JTAG Clock Speed, but it didn't actually work.
Debug Logs
Expected behavior
Hope to reduce the clock speed of JTAG.
Screenshots