esynr3z / corsair

Control and Status Register map generator for HDL projects
https://corsair.readthedocs.io
MIT License
95 stars 33 forks source link

#enhancement: add informative header to all auto-generated files #13

Open iDoka opened 2 years ago

iDoka commented 2 years ago

Based on good practice for auto-generated source files would be great to automaticaly add informative header to all auto-generated entities as comment:

DO NOT EDIT THIS AUTOGENERATED FILE. ALL CHANGES WILL BE LOST.

VHDL

-- DO NOT EDIT THIS AUTOGENERATED FILE. ALL CHANGES WILL BE LOST.

Verilog, SV, C, Asciidoc

// DO NOT EDIT THIS AUTOGENERATED FILE. ALL CHANGES WILL BE LOST.

Markdown

[//]: # (DO NOT EDIT THIS AUTOGENERATED FILE. ALL CHANGES WILL BE LOST.)

or

<!---
DO NOT EDIT THIS AUTOGENERATED FILE. ALL CHANGES WILL BE LOST.
--->

MD references: