Closed litghost closed 4 years ago
For the first issue my guess would be that the BUFHCE output traverses a clock region to get to another one, producing an invalid
route.
This could happen only in the case the clock signal is being routed through logic cells, instead of the dedicated clock network as, to get to another clock region through the dedicated network, the signal should be correctly routed through another BUFHCE.
I suspect this is a kind of issue related to https://github.com/SymbiFlow/symbiflow-arch-defs/issues/1153
There are currently two xc7 vendor CI flakes:
1:
And 2:
I know what the issue is with the second, but I haven't been able to replicate the first locally yet.