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WEEK 2 Mar 22 - Mar 28 #2

Open flaming-cl opened 3 years ago

flaming-cl commented 3 years ago

WEEK 2

flaming-cl commented 3 years ago

WEEK 2

Finished:

a) videos: lecture 15 State, State Machines b) project: project 1 lab3, 4

Review Lecture 6 - 12

To be honest, I often have my head in the clouds when watching Nikolic's videos. (I know I should not comment on his teaching style...) But, if anyone else finds it is quite hard to enjoy his lessons, I recommend you to watch the videos from 19 fall on bilibili.com I also strongly recommend you to watch the discussion videos from 20 summer. They are great supplementary materials.

My experience on learning RISC-V

Unlike high-level programming languages, such as C and Java, RISC-V is sort of counter-intuitive. When I first wrote RISC-V code, I felt so awkward and it was just like typing upside down.

(photo credit to WikiHow) To overcome such awkwardness, practice is the key. How to practice:
Unfortunately, there are so few practice questions (with solutions) for the cutting-edge RISC-V assembly language. So, our best choice is to make use of the discussion materials and the P&H book. For the discussion materials, if the 20 fall questions are not enough, you can try other semesters' questions as well. For the P&H book, there are plenty of examples and small questions. (I tried to make a guess and answer them first before reading any parts of the book, then finding clues from the book or aforementioned videos to support/correct my answers.)

Terms

1. three ways of addressing

  1. Base displacement addressing adds an immediate to a register value to create a memory address (nod for lw. lb. sw. sb).
  2. PC-relative addressing uses the PC and adds the immediate value of the instruction (multiplied by 2) to create an address (used by branch and jump instructions).
  3. Register addressing uses the value in a register as a memory address. For instance. jalr. jr, and ret. where jr and ret are just pseudo instructions that get converted to jalr.

2. relative | absolute address

j, jal => relative 
// +, - offset to PC
// 20 bits max range of instructions reached from the current address, [-2^18, 2^18 - 1] (get rid of the first bit position; pc)

jr, jalr => absolute  
// not in the current code file, need to jump somewhere else, e.g. files you've imported like printf
// 12 bits max range

3. pseudo instructions like li, mv

shorthand instructions

li t0, 5
addi t0, x0, 5

more examples: https://github.com/riscv/riscv-asm-manual/blob/master/riscv-asm.md

4. six steps for functions in RISC-V

1.Put arguments in a place (registers) where function can access them 2.Transfer control to function (jal) 3.Acquire (local) storage resources needed for function 4.Perform desired task of the function 5.Put return value in a place where calling code can access it and restore any registers you used; release local storage 6.Return control to point of origin, since a function can be called from several points in a program (ret)

5. some other questions/bg knowledge

1) if we have 16 parameters for a certain function, can we store all the parameters in registers?

3) CPU reads instructions line by line

PC is a register in a computer processor that only contains the address (location) of the instruction being executed at the current time. What if we wanna go to other instructions and not stick to the line by line rule?

lab3 summary

0. creating the Venus environment

Please don't follow the instructions from 20 fall to build your Venus server. It is kind of outdated. Otherwise, you might get the error:

mount: IllegalStateException: This version of Venus's drive handler (1.0.1) is not compatible with the mounted file server (1.0.0)!

Solution: follow the instructions from 21 spring

Great Reading Resources

1. calling conventions ★★★★★ 2. verilog 3. RISC-V notes from S6.081 4. Notes from Waterloo ECE222 5. RISC-V Reference Card (a more reader-friendly version)