[0:2] GPIOs should give 8 possible Mark revisions (e.g. MarkI, MarkII, MarkIII ... etc.)
[3:6] GPIOs should give 8 more sub-revisions within single Mark revision (e.g. MarkI rev.0, MarkI, rev.1, ... etc.)
FW can read GPIO state to implement backward-compatibility (if needed). HW revision must be exposed using modbus in #6
Uh oh, forgot about this one. Moving out of Proto II and from Mark I in general.
To be reviewed after: should've even bother now since pins are almost all depleted?
[0:2] GPIOs should give 8 possible Mark revisions (e.g. MarkI, MarkII, MarkIII ... etc.) [3:6] GPIOs should give 8 more sub-revisions within single Mark revision (e.g. MarkI rev.0, MarkI, rev.1, ... etc.)
FW can read GPIO state to implement backward-compatibility (if needed). HW revision must be exposed using modbus in #6