gtaylormb / opl3_fpga

Reverse engineered SystemVerilog RTL version of the Yamaha OPL3 (YMF262) FM Synthesizer
GNU Lesser General Public License v3.0
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Reset is_new and connection regs, remove unused signal #45

Closed gtaylormb closed 3 months ago

gtaylormb commented 3 months ago

Games will typically clear both banks on start and exit. However, if a reset occurs during a game that is using OPL3 features and sets new and connection regs, the next game may be OPL2-only and not clear the second bank as it doesn't exist on the OPL2.

Not resetting the other regs in the second bank is fine as the envelope for all operators gets reset to the RELEASE state.