Vectorized implementations

[hanshoglund]

Without changing semantics.

This is of course crucial for perfomance.

I.e. replace central loop step :: S -> (D, S) with stepV :: S -> (V D, S).

[hanshoglund]

This is actually more complicated than it looks, as we support arbitary small delays at the primitive level. Basically, we must separate each signal in different levels based on how far in time the write. For example, a single 64-vector pass could be:

• Run (step-size 1) all parts of the graph that writes n samples forward in time time where 1 <= n < 8
• Run (step-size 8) all parts of the graph that writes n samples forward in time time where 8 <= n < 16
• Run (step-size 16) all parts of the graph that writes n samples forward in time time where 16 <= n < 32
• Run (step-size 32) all parts of the graph that writes n samples forward in time time where 32 <= n < 64
• Run (step-size 64) all parts of the graph that has no delays, or writes more than 64 samples forward.

[hanshoglund]

Simple way: new Signal type tagged with vector-rate, which is always multiple of two. An output[t+n] must have vr < n, i.e. Output _ 30 must run at a rate of 16 samples or less (32 is too often). All vrs a are smaller than vs, which is maximum vs.

At runtime, a node is only run if mod vs count == 0. What to do with local sample count? Not sure.

[hanshoglund]

Project inactive, closing.